MT90500 Mitel Semiconductor, MT90500 Datasheet - Page 52

• Manufacturer Part Number: MT90500
• Description: Multi-Channel ATM AAL1 SAR
• Manufacturer: Mitel Semiconductor

MT90500
partially-filled cells, much lower values should be written in this field, thus reducing transmission delay. The
following equations (used to calculate the initial “Circ. Buf. Pnt.” to be written by the software) are valid for most
cell types:
AAL1 SDT-type Cells: Circ. Buf. Pointer = ROUNDUP ((max. # of payload bytes per cell / # of channels per
VC) * ROUNDUP (# of channels per VC / min. # of payload bytes per cell * 4)) + 5
All other cells: Circ. Buf. Pointer = ROUNDUP ((max. # of payload bytes per cell / # of channels per VC) *
ROUNDUP (# of channels per VC / min. # of payload bytes per cell * 4)) + 4
The “Offset” field is used by internal hardware to verify the offset between the TDM Circular Buffer Write
Pointer and the TX_SAR Read Pointer (which is stored in Circ. Buf. Pnt. in the Transmit Control Structure, once
the structure becomes active). Offset should be initialized to “00h”.
All Transmit Control Structures must begin on 16-byte boundaries, and may not overlap 256-byte boundaries.
Any Transmit Control Structure that overlaps a 256-byte boundary will cause unpredictable SAR behaviour.
The “First Entry”, “Current Entry”, and “Last Entry” fields are pointers that must be set relative to the beginning
of the particular Transmit Control Structure. The First Entry field represents the location of the first TX Circular
Buffer Address within a Transmit Control Structure. This 7-bit field represents the 8 LSBs of the actual entry
location divided by two (shifted right by one). When the Transmit Control Structure represents CBR-AAL0 or
AAL1 type data, the lower three bits of the “First Entry” will always be “110” since the first entry is always 12
bytes away from the start of the Transmit Control Structure. When transmitting CBR-AAL5 type cells, the lower
four bits of the “First Entry” will always be “1000” because the first TX Circular Buffer Address is located 16
bytes away from the start of the Transmit Control Structure. The “Current Entry” and “Last Entry” fields are
programmed similarly, with “Current Entry” bearing the same address as “First Entry” when the structure is
initialized by software. The programming of the First Entry and Last Entry fields for two examples can be seen
below in Figure 18. Note that the Transmit Control Structure is not active until the A bit in the first byte of the
structure is set HIGH.
The cell header portion of the Transmit Control Structure is passed directly to the UTOPIA bus without any
modifications. Typically, the PHY device will calculate the HEC and over-write the HEC field in the Transmit
Control Structure. However, in the case where the PHY device does not calculate the HEC field, the HEC byte
may be calculated by the CPU, and written into the HEC field of the Transmit Control Structure.
The AS field indicates to the TX_SAR if the VC is a CBR-AAL0/AAL5, AAL1-SRTS, or AAL1 VC. Note that only
one Transmit Control Structure can be programmed with the AAL1-SRTS flag. The SRTS only changes relative
to one VC since it can only be synchronized to one VC.
The “payload-size” field in the Transmit Control Structure indicates the number of TDM bytes carried in an ATM
cell. For a fully-loaded cell of AAL1 or CBR-AAL0, the payload-size field must be set to a value of 2Fh (decimal
47) which represents a full payload for CBR-AAL0 (48 TDM bytes), pointerless AAL1 Structured Data Transfer
(47 TDM bytes plus 1 AAL1 byte), and AAL1-SDT (47 TDM bytes plus 1 AAL1 byte, or 46 TDM bytes plus 1
AAL1 byte plus 1 pointer byte). For a fully-loaded cell of CBR-AAL5, the payload-size field must be set to a
value of 27h (decimal 39) which represents a full payload for CBR-AAL5 (40 TDM bytes). For partially-filled
cells, the payload-size field may be set to a value ranging from 03h to 2Eh. Note that these values represent
different numbers of payload bytes, depending on the type of data structuring that is being used. For example,
to represent a fill of 32 TDM bytes in each CBR-AAL0 or CBR-AAL5 cell, the user should set a payload-size of
1Fh. However, in order to ensure that each AAL1 cell (SDT or pointerless Structured Data Transfer format)
contains 32 TDM bytes, the payload-size must be set to 20h. Similarly, while a payload-size of 7h indicates that
the transmitted CBR-AAL0 or CBR-AAL5 cells contain 8 bytes of TDM data a payload-size of 8h is required to
ensure a fill of 8 TDM bytes in each cell transmitted using AAL1-SDT or pointerless AAL1 Structured Data
Transfer. In general, the payload-size field should be set to the expected number of TDM bytes when
transmitting AAL1-type cells, and it should be set to one less than the expected number of TDM bytes when
transmitting CBR-AAL0 and CBR-AAL5 cells. As well, it should be noted that 2Eh (decimal 46) is an illegal
value for AAL1-SDT.
The PSEL nibble is used to denote the cell(s) within an 8-cell sequence in which the pointer byte (P-byte) is to
be sent. When using pointerless AAL1 Structured Data Transfer, no pointer cells are ever sent, and the PSEL
nibble must be initialized to 0h. With SDT, pointers may be sent in cells 0, 2, 4, or 6 of a sequence. The
MT90500 can support both standardized and proprietary SDT formats. In order to meet ITU-T I.363.1, a
structure (i.e. a specific VC) must be composed of no more than 96 channels, and the P-byte must be sent in
the first (i.e. sequence number = 0) cell of each 8-cell cycle. Thus the PSEL field must be set to 1000 (the
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