upd78f0114hgb-8es-a Renesas Electronics Corporation., upd78f0114hgb-8es-a Datasheet - Page 220

• Manufacturer Part Number: upd78f0114hgb-8es-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

(3) When the CPU clock is the internal oscillation clock (f
220
Note Confirm the oscillation stabilization time of f
CPU operation
CPU operation
high-speed system clock (f
When the STOP instruction is executed, operation of the watchdog timer is stopped. After STOP mode is
released, counting is stopped until the timing of <1> or <2>, whichever is earlier, and then counting is started
using the operation clock before the operation was stopped. At this time, the counter is not cleared to 0 but holds
its value.
<1> The oscillation stabilization time set by the oscillation stabilization time select register (OSTS) elapses.
<2> The CPU clock is switched to the high-speed system clock (f
<1> Timing when counting is started after the oscillation stabilization time set by the oscillation stabilization time
<2> Timing when counting is started after the CPU clock is switched to the high-speed system clock (f
Watchdog timer
Watchdog timer
(OSTC).
Waiting for the oscillation stabilization time is not required when the external RC oscillation clock is selected
as the high-speed system clock by the option byte. Therefore, the CPU clock can be switched without
reading the OSTC value.
select register (OSTS) has elapsed
(CPU Clock: Internal Oscillator Clock, WDT Operation Clock: High-Speed System Clock)
f
f
XP
XP
f
f
R
Normal operation
(internal
oscillation clock)
Normal operation
(internal
oscillation clock)
R
Operating
Operating
XP
) when the STOP instruction is executed
Oscillation
Oscillation
stopped
stopped
Figure 10-6. Operation in STOP Mode
STOP
STOP
CHAPTER 10 WATCHDOG TIMER
(internal oscillation clock)
User’s Manual U16961EJ4V0UD
Operation stopped
Operation stopped
Oscillation stabilization time
Clock supply stopped
Normal operation
Oscillation stabilization time
(set by OSTS register)
Clock supply
XP
(set by OSTS register)
17 clocks
17 clocks
stopped
using the oscillation stabilization time counter status register
R
) and the watchdog timer operation clock is the
XP
).
Normal operation (internal oscillation clock)
CPU clock
f
R
Normal operation (high-speed system clock)
f
XP
Note
Operating
Operating
XP
)