upd78f0114hgb-8es-a Renesas Electronics Corporation., upd78f0114hgb-8es-a Datasheet - Page 293

• Manufacturer Part Number: upd78f0114hgb-8es-a
• Description: 8-bit Single-chip Microcontrollers
• Manufacturer: Renesas Electronics Corporation.

R
Remark T
X
(g) Noise filter of receive data
D6/P14
(h) SBF transmission
INTST6
SBTT6
T
The RxD6 signal is sampled with the base clock output by the prescaler block.
If two sampled values are the same, the output of the match detector changes, and the data is sampled as
input data.
Because the circuit is configured as shown in Figure 13-21, the internal processing of the reception operation
is delayed by two clocks from the external signal status.
When UART6 is used in the LIN communication operation, the SBF (Synchronous Break Field) transmission
control function is used for transmission. For the transmission operation of LIN, see Figure 13-1 LIN
Transmission Operation.
The TxD6 pin outputs a high level when bit 7 (POWER6) of asynchronous serial interface mode register 6
(ASIM6) is set to 1. Transmission is enabled when bit 6 (TXE6) of ASIM6 is set to 1 next time, and SBF
transmission operation is started when bit 5 (SBTT6) of asynchronous serial interface control register 6
(ASICL6) is set to 1.
After transmission has been started, the low levels of bits 13 to 20 (set by bits 4 to 2 (SBL62 to SBL60) of
ASICL6) are output. When SBF transmission is complete, a transmission completion interrupt request
(INTST6) is issued, and SBTT6 is automatically cleared. After SBF transmission is completed, the normal
transmission mode is restored.
SBF transmission is stopped until the data to be transmitted next is written to transmit buffer register 6
(TXB6) or SBTT6 is set to 1.
Base clock
X
D6
INTST6: Transmission completion interrupt request
SBTT6: Bit 5 of asynchronous serial interface control register 6 (ASICL6)
X
D6:
T
X
1
D6 pin (output)
2
In
3
CHAPTER 13 SERIAL INTERFACE UART6
Figure 13-21. Noise Filter Circuit
Figure 13-22. SBF Transmission
4
Q
User’s Manual U16961EJ4V0UD
5
6
Internal signal A
Match detector
7
8
9
10
11
In
LD_EN
12
13
Q
Stop
Internal signal B
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