st7fmc2s7t6 STMicroelectronics, st7fmc2s7t6 Datasheet - Page 119

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st7fmc2s7t6

Manufacturer Part Number
st7fmc2s7t6
Description
8-bit Mcu With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, Five Timers, Spi, Linsci
Manufacturer
STMicroelectronics
Datasheet
LINSCI
BAUD RATE REGISTER (SCIBRR)
Read/Write
Reset Value: 0000 0000 (00h)
Note: When LIN slave mode is disabled, the SCI-
BRR register controls the conventional baud rate
generator.
Bits 7:6 = SCP[1:0] First SCI Prescaler
These 2 prescaling bits allow several standard
clock division ranges:
Bits 5:3 = SCT[2:0] SCI Transmitter rate divisor
These 3 bits, in conjunction with the SCP1 and
SCP0 bits define the total division applied to the
bus clock to yield the transmit rate clock in conven-
tional Baud Rate Generator mode.
SCP1
7
PR Prescaling factor
SCP0
SERIAL COMMUNICATION INTERFACE (SCI Mode) (cont’d)
13
SCT2
1
3
4
SCT1
SCT0
SCP1
SCR2 SCR1 SCR0
0
1
SCP0
0
1
0
1
0
Bits 2:0 = SCR[2:0] SCI Receiver rate divider
These 3 bits, in conjunction with the SCP[1:0] bits
define the total division applied to the bus clock to
yield the receive rate clock in conventional Baud
Rate Generator mode.
RR dividing factor
TR dividing factor
128
128
16
32
64
16
32
64
1
2
4
8
1
2
4
8
SCR2
SCT2
0
1
0
1
ST7MC1/ST7MC2
SCR1
SCT1
0
1
0
1
0
1
0
1
SCR0
119/308
SCT0
0
1
0
1
0
1
0
1
0
1
0
1
0
1
0
1
1

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