st7fmc2s7t6 STMicroelectronics, st7fmc2s7t6 Datasheet - Page 258

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st7fmc2s7t6

Manufacturer Part Number
st7fmc2s7t6
Description
8-bit Mcu With Nested Interrupts, Flash, 10-bit Adc, Brushless Motor Control, Five Timers, Spi, Linsci
Manufacturer
STMicroelectronics
Datasheet
ST7MC1/ST7MC2
CLOCK AND TIMING CHARACTERISTICS (Cont’d)
Figure 137. PLL And Clock Detector Signal Start Up Sequence
Notes:
1. Lock does not go low without resetting the PLLEN bit.
2. Before setting the CKSEL bit by software in order to switch to the PLL clock, a period of t
elapsed.
3. 2 clock cycles are missing after CKSEL = 1
4. CKSEL bit must be set before enabling the CSS interrupt (CSSIE=1).
258/308
CKSEL
OSCIN
PLLEN
(PLL and CKD)
PLL CLOCK
LOCK
f
CSSD
CSSIE
INTERRUPT
CLK
2)
4)
t
setup
t lock
OSCIN Clock
16Mhz
3)
PLL clock
f
VCO
t
hold
=
1)
6 Mhz
lock
must have

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