mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 11

• Manufacturer Part Number: mg84fl54
• Description: Full-speed Usb Micro-controller
• Manufacturer: Megawin Technology

4. Hardware Option
The Hardware Option defines the device behavior which cannot be programmed or controlled by firmware. The
hardware options can only be programmed by a universal Writer/Programmer or Megawin proprietary Writer.
After whole-chip erased, all the hardware options are left in “disabled” state. The MG84FL54B has the following
Hardware Options:
ISP-memory Space:
The ISP-memory space is specified by its starting address. And, its higher boundary is limited by Flash end
address (See
on MG84FL54B.
Table 4-1 ISP-memory Size
Item
IAP-memory Space:
The IAP-memory space is specified by its low boundary. And, its higher boundary is limited by the starting
address of the ISP-memory space if the ISP-memory is configured; otherwise, its higher boundary is located at
address 0x3FFF (See
supplied on MG84FL54B.
Table 4-2 IAP-memory Size
HWBS:
HWBS2:
10
11
12
13
14
15
16
MEGAWIN
1
2
3
4
5
6
7
8
9
1
2
3
4
5
6
7
8
[enabled]: When power-up, CPU will boot from ISP-memory if ISP-memory is configured.
[disabled]: CPU always boots from AP-memory.
10.5K bytes
15.5K bytes
14.5K bytes
13.5K bytes
12.5K bytes
11.5K bytes
9.5K bytes
8.5K bytes
15K bytes
14K bytes
13K bytes
12K bytes
11K bytes
10K bytes
9K bytes
8K bytes
(No ISP space is configured.)
20.1 Flash Memory
IAP-memory Size
ISP-memory Size
3.5K bytes
2.5K bytes
1.5K bytes
20.1 Flash Memory
4K bytes
3K bytes
2K bytes
1K bytes
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
Configuration). The following table shows ISP-memory size setting supplied
IAP Disabled
7.5K bytes
6.5K bytes
5.5K bytes
4.5K bytes
3.5K bytes
2.5K bytes
1.5K bytes
0.5K bytes
7K bytes
6K bytes
5K bytes
4K bytes
3K bytes
2K bytes
1K bytes
Configuration). The following table shows IAP-memory size setting
MG84FL54B Data sheet
ISP Start Address
ISP Disabled
0x3C00
0x3A00
0x3000
0x3200
0x3400
0x3600
0x3800
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