mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 76

no-image

mg84fl54

Manufacturer Part Number
mg84fl54
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
be resumed at any time by setting AA. This means that the AA bit may be used to temporarily isolate TWSI from
the bus.
17.2.4. Slave Receiver Mode
In the slave receiver mode, a number of data bytes are received from a master transmitter. Data transfer is
initialized as in the slave transmitter mode.
When SIADR and SICON have been initialized, TWSI waits until it is addressed by its own slave address
followed by the data direction bit which must be “0” (W) for TWSI to operate in the slave receiver mode. After its
own slave address and the W bit have been received, the serial interrupt flag (SI) is set and a valid status code
can be read from SISTA. This status code is used to vector to an interrupt service routine, and the appropriate
action to be taken for each of these status codes is detailed in the following operating flow chart. The slave
receiver mode may also be entered if arbitration is lost while TWSI is in the master mode (see status 68H and
78H).
If the AA bit is reset during a transfer, TWSI will return a not acknowledge (logic 1) to SDA after the next
received data byte. While AA is reset, TWSI does not respond to its own slave address or a general call address.
However, the serial bus is still monitored and address recognition may be resumed at any time by setting AA.
This means that the AA bit may be used to temporarily isolate from the bus.
76
MG84FL54B Data Sheet
MEGAWIN

Related parts for mg84fl54