mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 24

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mg84fl54

Manufacturer Part Number
mg84fl54
Description
Full-speed Usb Micro-controller
Manufacturer
Megawin Technology
Datasheet
8. Reset Sources
During reset, all SFR are reset to their initial values noted in the SFR detail description and the content in RAM
is unpredictable. The port pins are weakly pulled to VDD_IO, and the program starts execution from the Reset
Vector, 0000H, or ISP start address by Hardware setting. Reset can be triggered from the following reset
sources:
Fig 8-1 Reset Sources
8.1. External Reset
A reset is accomplished by holding the RST pin HIGH for at least 24 oscillator periods while the oscillator is
running. To ensure a reliable power-up reset, the hardware reset from RST pin is necessary.
8.2. Power-on Reset
Power-on reset (POR) is used to internally reset the CPU during power-up. The CPU will keep in reset state and
will not start to work until the VDD_CORE power rises above the voltage of Power-On Reset. And, the reset
state is activated again whenever the VDD_CORE power falls below the POR voltage. During a power cycle,
VDD_CORE must fall below the POR voltage before power is reapplied in order to ensure a power-on reset.
PCON (Address=87H, Power Control Register)
POF: Power-ON Flag.
The Power-on Flag, POF, is set to “1” by hardware during power up or when VDD_CORE power drops below
the POR voltage. It can be clear by firmware and is not affected by any warm reset such as external reset,
software reset (ISPCR.5) and WDT reset. It helps users to check if the running of the CPU begins from power
up or not. Note that the POF should be cleared by firmware.
Note:
8.3. Watchdog Timer Reset
When the Watchdog Timer is enabled, it will increment every 12 x Prescaler system clock cycles while the
oscillator is running. And, the user needs to service it to avoid an overflow, which will generate an internal reset
24
SMOD
7
If using Megawin proprietary ISP code, like USB DFU, POF will be cleared by the ISP code in power-on
procedure.
unpredictable failure on ISP operating.
code in default. If user won’t need the ISP code or will insert self ISP code, writer tool can support the
erase and re-program to configure user setting.
Software Reset
External Reset
External reset from RST pin
Power-on reset
Watch-dog Timer reset
Software reset
WDT Reset
SMOD0
POR
And firmware should not write “1” on this bit in this ISP condition to avoid an
6
5
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MG84FL54B Data Sheet
POF
4
Megawin released MG84FL54B samples have inserted the ISP
Internal Reset
GF1
3
GF0
2
PD
1
IDL
0
MEGAWIN

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