mg84fl54 Megawin Technology, mg84fl54 Datasheet - Page 74

• Manufacturer Part Number: mg84fl54
• Description: Full-speed Usb Micro-controller
• Manufacturer: Megawin Technology

Table 17-1 TWSI Clock Rates
The Status Register, SISTA, Address=D3H
SISTA is an 8-bit read-only register. The three least significant bits are always 0. The five most significant bits
contain the status code. There are a number of possible status codes. When SISTA contains F8H, no serial
interrupt is requested. All other SISTA values correspond to defined TWSI states. When each of these states is
entered, a status interrupt is requested (SI=1). A valid status code is present in SISTA when SI is set by
hardware.
In addition, state 00H stands for a Bus Error. A Bus Error occurs when a START or STOP condition is present
at an illegal position, such as inside an address/data byte or just on an acknowledge bit.
SISTA (Address=D3H, TWSI Status Register)
17.2. Operating Modes
There are four operating modes for the TWSI: 1) Master/Transmitter mode, 2) Master/Receiver mode, 3)
Slave/Transmitter mode and 4) Slave/Receiver mode. Bits STA, STO and AA in SICON decide the next action
which the TWSI hardware will take after SI is cleared by firmware. When the next action is completed, a new
status code in SISTA will be updated and SI will be set by hardware in the same time. Now, the interrupt service
routine is entered (if the TWSI interrupt is enabled), and the new status code can be used to determine which
appropriate routine the firmware is to branch to.
17.2.1. Master Transmitter Mode
In the master transmitter mode, a number of data bytes are transmitted to a slave receiver. Before the master
transmitter mode can be entered, SICON must be initialized as follows:
SICON
CR0, CR1, and CR2 define the serial bit rate. ENSI must be set to logic 1 to enable TWSI. If the AA bit is reset,
TWSI will not acknowledge its own slave address or the general call address in the event of another device
becoming master of the bus. In other words, if AA is reset, TWSI cannot enter a slave mode. STA, STO, and SI
must be reset.
The master transmitter mode may now be entered by setting the STA bit using the SETB instruction. The TWSI
logic will now test the serial bus and generate a START condition as soon as the bus becomes free. When a
START condition is transmitted, the serial interrupt flag (SI) is set, and the status code in the status register
74
CR2
Bit rate
CR2
0
0
0
0
1
1
1
1
(b7)
7
7
CR1
0
0
1
1
0
0
1
1
ENSI
(b6)
1
6
6
CR0
0
1
0
1
0
1
0
1
STA
(b5)
TWSI Clock Rate @ SYSCLK=12MHz
0
5
5
STO
MG84FL54B Data Sheet
4
0
(b4)
4
12.5 KHz
400 KHz
200 KHz
100 KHz
1.5 MHz
50 KHz
25 KHz
1 MHz
SI
0
3
(b3)
3
AA
x
2
(b2)
2
SYSCLK divided by
CR1
1
(b1)
Bit rate
1
120
240
480
960
12
30
60
8
CR0
0
(b0)
0
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