nt1gt72u8pb0by Nanya Techology, nt1gt72u8pb0by Datasheet - Page 8

• Manufacturer Part Number: nt1gt72u8pb0by
• Description: 240pin Unbuffered Ddr2 Sdram Module With Ecc Based On 64mx8 Ddr2 Sdram B Die
• Manufacturer: Nanya Techology

NT512T72U89B0BY / NT1GT72U8PB0BY
512MB: 64M x 72 / 1GB: 128M x 72
Unbuffered DDR2 SDRAM DIMM with ECC
Serial Presence Detect --
64Mx64 1RANK UNBUFFERED DDR2 SDRAM DIMM based on 64Mx8, 4Banks, 8K Refresh, 1.8V DDR2 SDRAMs with SPD
REV 1.3
03/2007
Byte
37
38
39
40
41
42
43
44
45
46
47
48
49
50
51
52
53
54
55
56
57
58
59
60
61
62
Internal Write to Read Command delay (t
Internal Read to Precharge delay (t
Memory Analysis Probe Characteristics
Extension of Byte 41 t
Minimum Core Cycle Time (t
Min. Auto Refresh Command Cycle Time (t
Maximum Clock Cycle Time (t
Max. DQS-DQ Skew Factor (t
Read Data Hold Skew Factor (t
PLL Relock Time
Tcasemax
DT4R4W Delta
Thermal Resistance of DRAM Package from Top (Case) to
Ambient (Psi-T-A DRAM)
DRAM Case Temperature Rise from Ambient due to
Activate-Precharge/Mode Bits (DT0/Mode Bits)
DRAM Case Temperature Rise from Ambient due to
Precharge/Quiet Standby (DT2N/DT2Q)
DRAM Case Temperature Rise from Ambient due to
Precharge Power-Down (DT2P)
DRAM Case Temperature Rise from Ambient due to Active
Standby (DT3N)
DRAM Case Temperature Rise from Ambient due to Active
Power-Down with Fast PDN Exit (DT3Pfast)
DRAM Case Temperature Rise from Ambient due to Active
Power-Down with Slow PDN Exit (DT3Pslow)
DRAM Case Temperature Rise from Ambient due to Page
Open Burst Read/DT4R4W Mode Bit (DT4R/DT4R4W Mode
Bit)
DRAM Case Temperature Rise from Ambient due to Burst
Refresh (ST5B)
DRAM Case Temperature Rise from Ambient due to Bank
interleave Reads with Auto-Precharge (DT7)
Thermal Resistance of PLL Package from Top (Case) to
Ambient (Psi T-A PLL)
Thermal Resistance of Register Package from Top (Case) to
Ambient (Psi T-A Register)
PLL Case Temperature Rise from Ambient due to PLL Active
(DT PLL Active)
Register Case Temperature Rise from Ambient due to
Register Active/Mode Bit (DT Register Active/Mode Bit)
SPD Reversion
RC
Description
and Byte 42 t
RC
DQS
CK
)
QHS
Part 2 of 3 (512MB)
)
) (ns)
) (ns)
RTP
)
RFC
WTR
RFC
)
)
8
NANYA TECHNOLOGY CORP. reserves the right to change Products and Specifications without notice.
00: The number below a
decimal point of tRC and
tRFC are 0, tRFC is less
than 256ns.
30: The number below a
decimal point of tRC is 5,
tRFC is less than 256ns.
50:
Max 95˚C / DT4RDT4W=0˚C
53:
Max95˚C/DT4RDT4W=1.2˚C
12.75
17.39
18.54
-37B
0.40
4.64
4.98
3.25
8.11
0.3
ns
ns
˚C
˚C
˚C
˚C
˚C
˚C
˚C
60.0
SPD Entry Value
ns
15.07
18.54
0.24
0.34
8.69
3.82
-3C
5.8
5.8
Undefined
ns
ns
˚C
˚C
˚C
˚C
˚C
˚C
61˚C/W
0.81˚C
1.04˚C
105ns
7.5ns
7.5ns
8.0ns
N/A
1.2
00
00
00
00
19.7˚C
-25C
57.5
ns
17.96
20.28
0.20
0.30
9.74
5.91
6.95
4.52
ns
ns
˚C
˚C
˚C
˚C
˚C
˚C
-25D
60.0
ns
-37B
1E
28
50
4B
2F
22
41
40
23
26
Serial PD Data Entry
3C
00
(Hexadecimal)
-3C
4D
4C
3A
© NANYA TECHNOLOGY CORP.
18
22
53
53
27
26
1E
1E
7A
2A
00
69
80
00
37
00
00
00
00
12
-25C
30
39
28
1E
3C
5B
5C
14
50
63
2F
29
-25D
3C
00
Note