mt47h64m8b6-5e-it Micron Semiconductor Products, mt47h64m8b6-5e-it Datasheet - Page 64

• Manufacturer Part Number: mt47h64m8b6-5e-it
• Description: 512mb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Table 37:
PDF: 09005aef82f1e6e2/Source: 09005aef821aed36
DDR2_x4x8x16_Core2.fm - 512Mb DDR2: Rev. L; Core DDR2: Rev. C 4/08 EN
Current
State
Any
Idle
Row active
Read (auto-
precharge
disabled)
Write (auto-
precharge
disabled)
Truth Table – Current State Bank n – Command to Bank n
Notes: 1–6 apply to the entire table
CS#
Notes:
H
L
L
L
L
L
L
L
L
L
L
L
L
L
1. This table applies when CKEn - 1 was HIGH and CKEn is HIGH and after
2. This table is bank-specific, except where noted (the current state is for a specific bank and
3. Current state definitions:
4. The following states must not be interrupted by a command issued to the same bank. Issue
RAS#
H
H
H
H
H
H
H
(if the previous state was self refresh).
the commands shown are those allowed to be issued to that bank when in that state).
Exceptions are covered in the notes below.
Idle:
Row active:
Read:
Write:
DESELECT or NOP commands, or allowable commands to the other bank, on any clock edge
occurring during these states. Allowable commands to the other bank are determined by its
current state and this table, and according to Table 38 on page 66.
Precharge:
Read with auto
precharge
enabled:
Row activate:
Write with auto
precharge
enabled:
X
L
L
L
L
L
L
CAS#
H
H
H
H
H
X
L
L
L
L
L
L
L
L
The bank has been precharged,
is complete.
A row in the bank has been activated, and
data bursts/accesses and no register accesses are in progress.
A READ burst has been initiated, with auto precharge disabled and
has not yet terminated.
A WRITE burst has been initiated with auto precharge disabled and
has not yet terminated.
Starts with registration of a PRECHARGE command and ends when
is met. After
Starts with registration of a READ command with auto precharge
enabled and ends when
will be in the idle state.
Starts with registration of an ACTIVATE command and ends when
t
Starts with registration of a WRITE command with auto precharge
enabled and ends when
will be in the idle state.
WE#
RCD is met. After
H
H
H
H
H
H
X
L
L
L
L
L
L
L
64
DESELECT (NOP/continue previous operation)
NO OPERATION (NOP/continue previous
operation)
ACTIVATE (select and activate row)
REFRESH
LOAD MODE
READ (select column and start READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE (deactivate row in bank or banks)
READ (select column and start new READ burst)
WRITE (select column and start WRITE burst)
PRECHARGE (start PRECHARGE)
READ (select column and start READ burst)
WRITE (select column and start new WRITE burst)
PRECHARGE (start PRECHARGE)
t
RP is met, the bank will be in the idle state.
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
RCD is met, the bank will be in the row active state.
Command/Action
512Mb: x4, x8, x16 DDR2 SDRAM
t
t
RP has been met. After
RP has been met. After
t
RP has been met, and any READ burst
©2004 Micron Technology, Inc. All rights reserved.
t
RCD has been met. No
t
t
RP is met, the bank
RP is met, the bank
t
XSNR has been met
Commands
Notes
8, 10
7
7
8
8
9
8
8
8
8
9
t
RP