mt47h64m8b6-5e-it Micron Semiconductor Products, mt47h64m8b6-5e-it Datasheet - Page 87

• Manufacturer Part Number: mt47h64m8b6-5e-it
• Description: 512mb X4, X8, X16 Ddr2 Sdram
• Manufacturer: Micron Semiconductor Products

Figure 50:
Figure 51:
DQS, DQS#
PDF: 09005aef82f1e6e2/Source: 09005aef821aed36
DDR2_x4x8x16_Core2.fm - 512Mb DDR2: Rev. L; Core DDR2: Rev. C 4/08 EN
Command
Address
CK#
A10
DQ
CK
READ 1
Valid 4
T0
Nonconsecutive READ Bursts
READ Interrupted by READ
Notes:
Notes:
t CCD
NOP 2
T1
CL = 3 (AL = 0)
DQS, DQS#
DQS, DQS#
Command
Command
1. DO n (or b) = data-out from column n (or column b).
2. BL = 4.
3. Three subsequent elements of data-out appear in the programmed order following DO n.
4. Three subsequent elements of data-out appear in the programmed order following DO b.
5. Shown with nominal
6. Example applies when READ commands are issued to different devices or nonconsecutive
1. BL = 8 required; auto precharge must be disabled (A10 = LOW).
2. NOP or COMMAND INHIBIT commands are valid. PRECHARGE command cannot be issued to
3. Interrupting READ command must be issued exactly 2 ×
4. READ command can be issued to any valid bank and row address (READ command at T0 and
5. Auto precharge can be either enabled (A10 = HIGH) or disabled (A10 = LOW) by the inter-
6. Example shown uses AL = 0; CL = 3, BL = 8, shown with nominal
Address
Address
READs.
banks used for READs at T0 and T2.
T2 can be either same bank or different bank).
rupting READ command.
CK#
CK#
READ 3
Valid 5
Valid 4
DQ
DQ
CK
CK
T2
READ
READ
Bank,
Bank,
Col n
Col n
T0
T0
NOP 2
T3
CL = 3 (AL = 0)
DO
NOP
NOP
T1
T1
t
CL = 3
AC,
DO
Valid
T4
t
CL = 4
DQSCK, and
NOP
NOP
T2
T2
DO
87
DO
Valid
READ
READ
Bank,
Bank,
Col b
Col b
T5
T3
T3
Micron Technology, Inc., reserves the right to change products or specifications without notice.
t
DO
DQSQ.
DO
n
T3n
512Mb: x4, x8, x16 DDR2 SDRAM
DO
NOP
NOP
T4
T4
Valid
T6
DO
n
DO
T4n
T4n
t
NOP
NOP
T5
T5
DO
CK from previous READ.
Valid
T7
T5n
Transitioning Data
DO
Transitioning Data
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t
AC,
T6
NOP
T6
NOP
DO
DO
t
b
DQSCK, and
T6n
Valid
T8
DO
T7
T7
NOP
NOP
Operations
DO
b
DO
T7n
T7n
Don’t Care
Valid
t
T9
Don’t Care
DQSQ.
NOP
NOP
T8
T8