adf4196 Analog Devices, Inc., adf4196 Datasheet - Page 7

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adf4196

Manufacturer Part Number
adf4196
Description
Low Phase Noise, Fast Settling, 6 Ghz Pll Frequency Synthesizer
Manufacturer
Analog Devices, Inc.
Datasheet
Data Sheet
Pin No.
23
24
25
26
27
28
29
30
31
32
Mnemonic
R
V
AIN−
CP
SW2
SW
SW1
CP
AIN+
V
EP
SET
P
P
2
3
OUT−
OUT+
GND
Description
Connecting a resistor between this pin and GND sets the charge pump output current. The nominal voltage bias at
the R
Therefore, with R
Power Supply Pin for the Charge Pump. Nominally 5 V, V
decoupling capacitor to the ground plane as close as possible to this pin.
Negative Input Pin for the Differential Amplifier.
Differential Charge Pump Negative Output Pin. Connect this pin to AIN− and the loop filter.
Fast Lock Switch 2. This switch is closed to SW
Ground for SW1 and SW2 Switches. Connect this pin to the ground plane.
Fast Lock Switch 1. This switch is closed to SW
Differential Charge Pump Positive Output Pin. Connect this pin to AIN+ and the loop filter.
Positive Input Pin for the Differential Amplifier.
Power Supply Pin for the Differential Amplifier. Ranges from 5.0 V to 5.5 V. Place a 0.1 µF decoupling capacitor to
the ground plane as close as possible to this pin. V
Exposed Paddle. The exposed paddle must be connected to the ground plane.
SET
I
CP
pin is 0.55 V. The relationship between I
=
R
. 0
SET
25
SET
= 2.4 kΩ, I
CP
= 104 µA.
Rev. B | Page 7 of 28
GND
GND
CP
P
when the SW1/SW2 timeout counter is active.
when the SW1/SW2 timeout counter is active.
and R
3 also requires a 10 µF decoupling capacitor to the ground plane.
SET
P
2 should be at the same voltage as V
is
P
1. Place a 0.1 µF
ADF4196

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