dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 112
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
(133 pages)
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NXP Semiconductors
Table 140. Equalizer gain registers (address 08h to 0Bh) bit description
Default values are shown highlighted.
Table 141. Equalizer offset registers (address 0Ch to 0Fh) bit description
Default values are shown highlighted.
DAC1628D1G25
Objective data sheet
Address
0Ah
0Bh
Address Register
0Ch
0Dh
0Eh
0Fh
HS_RX_0_EQ_OFS
HS_RX_1_EQ_OFS
HS_RX_2_EQ_OFS
HS_RX_3_EQ_OFS
Register
HS_RX_2_EQ_GAIN 5 to 4
HS_RX_3_EQ_GAIN 5 to 4
Bit
6
5 to 0
6
5 to 0
6
5 to 0
6
5 to 0
Bit
2 to 0
2 to 0
All information provided in this document is subject to legal disclaimers.
Symbol
HS_RX_0_EQ_INPUT_
SHORT
HS_RX_0_EQ_OFFSET[5:0]
HS_RX_1_EQ_INPUT_
SHORT
HS_RX_1_EQ_OFFSET[5:0]
HS_RX_2_EQ_INPUT_
SHORT
HS_RX_2_EQ_OFFSET[5:0]
HS_RX_3_EQ_INPUT_
SHORT
HS_RX_3_EQ_OFFSET[5:0]
GAIN[2:0]
Symbol
HS_RX_2_EQ_HF_
GAIN[1:0]
HS_RX_2_EQ_IF_
GAIN[2:0]
HS_RX_3_EQ_HF_
GAIN[1:0]
HS_RX_3_EQ_IF_
Rev. 1.1 — 10 October 2011
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Access Value
R/W
R/W
Access Value
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
-
-
-
-
…continued
0
1
-
0
1
-
0
1
-
-
0
1
-
Description
sets hf-gain for rx_ln2 equalizer
sets if-gain for rx_ln2 equalizer
sets hf-gain for rx_ln3 equalizer
sets if-gain for rx_ln3 equalizer
DAC1628D1G25
Description
to V
rx_ln0 equalizer offset
adjustment input
to V
to V
to V
rx_ln3 equalizer offset
adjustment input
rx_ln0 input equalizer shorted
rx_ln1 input equalizer shorted
rx_ln2 input equalizer shorted
rx_ln3 input equalizer shorted
rx_ln1 equalizer offset
rx_ln2 equalizer offset
no action
rx_ln0 equalizer input
shorted to V
no action
rx_ln1 equalizer input
shorted to V
adjustment input
no action
rx_ln2 equalizer input
shorted to V
adjustment input
no action
rx_ln3 equalizer input
shorted to V
DD
DD
DD
DD
© NXP B.V. 2011. All rights reserved.
DD
DD
DD
DD
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