dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 58
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
(133 pages)
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NXP Semiconductors
Table 53.
Default values are shown highlighted.
Table 54.
Default values are shown highlighted.
Table 55.
Default values are shown highlighted.
Table 56.
Default values are shown highlighted.
Table 57.
Default values are shown highlighted.
Table 58.
Default values are shown highlighted.
Table 59.
Default values are shown highlighted.
DAC1628D1G25
Objective data sheet
Address Register
08h
09h
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
7 to 0
Bit
4
2 to 0
Bit
7 to 0
Symbol
LMFC_PERIOD[7:0]
Symbol
LMFC_PRESET[7:0]
Symbol
MDS_CNT_PRESET[7:0]
Symbol
SYNC_LMFC_PE[7:0]
Symbol
MDS_SYNC_INIT
SYNC_FINE_DLY[2:0]
Symbol
MDS_DAISY_CYCLES[7:0]
MDS_WIN_PERIOD_A
MDS_WIN_PERIOD_B
MDS window registers (address 08h to 09h) bit description
LMFC_PERIOD register (address 0Ah) bit description
LMFC_PRESET register (address 0Bh) bit description
MDS_CNT_PRESET register (address 0Ch) bit description
SYNC_LMFC_PE register (address 0Dh) bit description
MDS_SYNC_CTRL register (address 0Eh) bit description
MDS_DAISY_CYCLES register (address 10h) bit description
Bit
7 to 0 MDS_WIN_
7 to 0 MDS_WIN_
Access
R/W
Access
R/W
Access
R/W
Access
R/W
Access
R/W
R/W
Access
R/W
All information provided in this document is subject to legal disclaimers.
Symbol
PERIOD_A[7:0]
PERIOD_B[7:0]
Rev. 1.1 — 10 October 2011
Value
-
Value
-
Value
-
Value
-
Value
0
1
-
Value
-
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Access Value
R/W
R/W
Description
determines the LMFC period
Description
delays the LMFC period as related to the internal sref
signal
Description
determines the sref position as related to the sysref
signal
Description
determines the pos_edge SYNCB position pos_edge
as related to LMFC
Description
MDS synchronization initialization
fine-tuning SYNCB position
(sync_rq (dacclk accuracy))
Description
number of digital clock periods required to synchronize
daisy partner
initial state SYNCB = ‘0’.
initial state SYNCB = ‘1’.
-
-
DAC1628D1G25
Description
determines MDS window LOW time
determines MDS window HIGH time
© NXP B.V. 2011. All rights reserved.
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