dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 62
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
(133 pages)
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Table 67.
Default values are shown highlighted.
Table 68.
Default values are shown highlighted.
DAC1628D1G25
Objective data sheet
Address Register
1Bh
1Ch
Bit
4 to 0
Symbol
PAGE[4:0]
INTR_FLAGS_0
INTR_FLAGS_1
INTR_FLAGS registers (address 19h to 1Ah) bit description
PAGE_ADDRESS register (address 1Fh) bit description
Bit
7
6
5
4
3
2
1
0
6
5
4
3
2
1
0
Access
R/W
All information provided in this document is subject to legal disclaimers.
Symbol
INTR_DLP
MDS_BSY
MDS_BSY
TEMP_ALARM
CLIP_DET_OR
CA_ERR
CLK_MON
MON_DCLK_ERR
RPT_FLAG_ERR
MC_ALARM
MAQ_RDY_B
MAQ_RDY_A
AUTO_DL_RDY
AUTO_CAL_RDY
FLAG_DL_ERR
Rev. 1.1 — 10 October 2011
Value
-
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Access Value
R
R
Description
SPI page address
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
DAC1628D1G25
Description
intr_dlp active
indicates transition 1 0 on
mds_busy
indicates transition 0 1 on
mds_busy
indicates transition 0 1 on
temp_alarm
indicates transition 0 1 on
clip_detect (a or b)
indicates transition 0 1 on
clock_align_monitor
indicates transition 0 1 on
clkmon (div8)
indicates transition 0 1 on
mon_dclk_error_flags
indicates transition 0 1 on
err_rpt_flag
indicates alarm event detected by
mute_cntrl
indicates that acquisition_module B
is ready
indicates that acquisition_module#A
is ready
indicates that auto_download_mtp is
done
indicates that auto_calibration is
done
indicates transition 0 1 on
err_flag_download_mtp
© NXP B.V. 2011. All rights reserved.
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