dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 24
dac1628d1g25
Manufacturer Part Number
dac1628d1g25
Description
Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
Manufacturer
NXP Semiconductors
Datasheet
1.DAC1628D1G25.pdf
(133 pages)
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NXP Semiconductors
Table 12.
DAC1628D1G25
Objective data sheet
MODULATION[2:0] Mode
000
001
010
011
100
others
Complex modulator operation mode
10.7.1 40-bit NCO
10.7.2 NCO low power
bypass
positive
upper ssb
positive
lower ssb
negative
upper ssb
negative
lower ssb
not defined
Table 12
When using the NCO, the 5 registers FREQNCO_B0 to FREQNCO_B4 over 40 bits (see
Table
The frequency is calculated with
Where:
The registers PHINCO_LSB and PHINCO_MSB over 16 bits from 0 to 360
(see
The default settings represent an NCO frequency of 96 MHz when using a DAC clock of
640 Msps. For other DAC clock frequencies, use
NCO frequency.
When using NCO low power (bit NCO_LP_SEL; see
bits of register FREQNCO_B4 (bits FREQ_NCO[39:32]; see
frequency.
The frequency is calculated with
f
f
NCO
NCO
•
•
M is the value set in the bits FREQNCO[39:0] of the NCO frequency registers
(see
f
s
Table
=
=
21) can set the frequency.
is the DAC output clock sampling frequency
M
--------------
M
--------------
Table
shows the various possibilities set by register MODULATION (see
2
2
Path A
-
I t
I t
I t
I t
40
40
20) can set the phase of the NCO.
f
f
s
s
21).
cos
cos
cos
cos
All information provided in this document is subject to legal disclaimers.
NCO
NCO
NCO
NCO
Rev. 1.1 — 10 October 2011
t
t
t
t
I t
–
+
–
+
Q t
Q t
Q t
Q t
Dual 16-bit DAC: JESD204B interface; up to 1.25 Gsps
Equation
Equation
sin
sin
sin
sin
NCO
NCO
NCO
NCO
1:
2:
t
t
t
t
Equation 1
Path B
-
I t
I t
–
–
I t
I t
Table
sin
sin
DAC1628D1G25
sin
sin
19), the five most significant
NCO
NCO
to define the associated
Table
NCO
NCO
t
t
t
t
21) can set the
Q t
+
–
–
+
Q t
Q t
Q t
Q t
© NXP B.V. 2011. All rights reserved.
cos
cos
Table
cos
cos
NCO
NCO
NCO
NCO
19).
24 of 133
t
t
(1)
(2)
t
t
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