dac1628d1g25 NXP Semiconductors, dac1628d1g25 Datasheet - Page 52

• Manufacturer Part Number: dac1628d1g25
• Description: Dual 16-bit Dac Jesd204b Interface Up To 1.25 Gsps; X2, X4 And X8 Interpolating
• Manufacturer: NXP Semiconductors

Table 44.
Address
0
1
2
3
4
5
6
7
8
9
10
11
00h
01h
02h
03h
04h
05h
06h
07h
08h
09h
0Ah
0Bh
10.17.3.1 Page x02 allocation map
Page x02 register allocation map
Register name
MDS_MAIN
MDS_VS1_CTRL
MDS_IO_CTRL
MDS_MISC_CTRL0
MDS_MAN_ADJUST_
DLY
MDS_AUTO_CYCLES
MDS_MISC_CTRL1
MDS_OFFSET_DLY
MDS_WIN_PERIOD_A
MDS_WIN_PERIOD_B
LMFC_PERIOD
LMFC_PRESET
10.17.3 Page x02: Multiple devices synchronization and interrupt
This page specifies the configuration of the SYSREF signals (East and West) and how they are used for the multiple devices
synchronization (MDS) feature. It also specifies the interrupts.
Table 44
shows an overview of all registers on page x02.
R/W
R/W
R/W
R/W
R/W
R/W
R/W
R/W
RW
R/W
R/W
R/W
R/W
MDS_SR_
MDS_EQ_CHECK[1:0]
MDS_
CKEN
Bit 7
RUN
DLP_ISSUE_
-
-
COND[1:0]
LOCKOUT
MDS_SR_
MDS_
Bit 6
NCO
-
-
IGN_EN_
CORR
SR_LOCK
PULSE
MDS_
MDS_
NCO_
MDS_
Bit 5
MAN
-
-
MDS_MAN_ADJUST_DLY[7:0]
MDS_WIN_PERIOD_A[7:0]
MDS_WIN_PERIOD_B[7:0]
MDS_AUTO_CYCLES[7:0]
MDS_
DAISY_
KEEP_
SREF
SREF_DIS
RELOCK
LMFC_PRESET[7:0]
LMFC_PERIOD[7:0]
EVAL_
MDS_
MDS_
MDS_
Bit 4
EN
Bit definition
-
I_REINIT_MODE[1:0]
MDS_SEL
PRERUN_
EAST_
_FE_E
WEST
MDS_
MDS_
Bit 3
EN
MDS_OFFSET_DLY[4:0]
MDS_SEL
MDS_LOCK_DLY[3:0]
_RT_E
Bit 2
MDS_MODE[1:0]
MDS_PULSEWIDTH[2:0]
MDS_SEL
_FE_W
Bit 1
-
MDS_SEL
MDS_EN
_RT_W
Bit 0
-
Default
Bin
0000
0000
0000
0110
0000
0000
0001
0000
1000
0000
1000
0000
0000
1111
0000
0000
1111
0000
0111
0000
1000
0000
0000
0100
Hex
00h
06h
00h
10h
80h
80h
0Fh
00h
0Fh
07h
08h
04h
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