ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 113
ep3c120f780c8nes
Manufacturer Part Number
ep3c120f780c8nes
Description
Cyclone Iii Device Family
Manufacturer
Altera Corporation
Datasheet
1.EP3C120F780C8NES.pdf
(582 pages)
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PLLs in
Cyclone III
Devices
Altera Corporation-Preliminary
March 2007
C (output counters)
M, N, C counter sizes
Dedicated clock outputs
Clock input pins
Spread-spectrum input clock tracking
PLL Cascading
Compensation modes
Phase shift resolution
Programmable duty cycle
Output counter cascading
Input clock Switchover
User mode reconfiguration
Table 6–5. Cyclone III PLL Hardware Features (Part 1 of 2)
Hardware Features
Cyclone III devices offer up to four PLLs that provide robust clock
management and synthesis for device clock management, external
system clock management, and high-speed I/O interfaces.
shows the PLLs available for each Cyclone III device.
All Cyclone III PLLs have the same core analog structure.
shows the features available in Cyclone III PLLs.
EP3C5
EP3C10
EP3C16
EP3C25
EP3C40
EP3C55
EP3C80
Table 6–4. Cyclone III Device Availability
Device
PLL1
5
1 to 512
1 single-ended or 1 differential
4 single-ended or 2 differential pins
Yes
Through GCLK
Source-Synchronous Mode, No Compensation Mode,
Normal Mode, and Zero Delay Buffer Mode
Down to 96-ps increments
Yes
Yes
Yes
Yes
v
v
v
v
v
v
v
(2)
(1)
Cyclone III Device Handbook, Volume 1
PLL 2
v
v
v
v
v
v
v
Availability
PLLs in Cyclone III Devices
(3)
PLL 3
v
v
v
v
v
Table 6–5
Table 6–4
PLL 4
v
v
v
v
v
6–13
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