ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 298

• Manufacturer Part Number: ep3c120f780c8nes
• Description: Cyclone Iii Device Family
• Manufacturer: Altera Corporation

Configuring Cyclone III Devices
Figure 10–20. Single Device FPP Configuration Using an External Host
Notes to
(1)
(2)
(3)
(4)
10–62
Cyclone III Device Handbook, Volume 1
Connect the pull-up resistor to a supply that provides an acceptable input signal for the device. V
enough to meet the V
The nCEO pin can be left unconnected or used as a user I/O pin when it does not feed other device’s nCE pin.
The MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0],
refer to
All I/O inputs must maintain a maximum AC voltage of 4.1 V. The DATA[7..0] and DCLK has to fit the maximum
overshoot equation outlined in
Figure
Table
10–20:
10–12. Connect the MSEL pins directly to V
f
(MAX II Device or
Microprocessor)
External Host
IH
specification of the I/O on the device and the external host.
ADDR
For more information about PFL, refer to the AN 386: Using the MAX II
Parallel Flash Loader with the Quartus II Software application note on the
Altera web site at www.altera.com.
FPP Configuration Using a MAX II Device as an External Host
FPP configuration using an external host provides a fast method to
configure Cyclone III devices. In the FPP configuration scheme, you can
use a MAX II device as an intelligent host that controls the transfer of
configuration data from a storage device, such as flash memory, to the
target Cyclone III device. You can store configuration data in RBF, HEX,
or TTF format. When using a MAX II device as an intelligent host, a
design that controls the configuration process, such as fetching the data
from flash memory and sending it to the device, must be stored in the
MAX II device.
Figure 10–20
Cyclone III device and a MAX II device for single device configuration.
1
Memory
“Configuration and JTAG Pin I/O Requirements” on page
DATA[7..0]
All I/O inputs must maintain a maximum AC voltage of 4.1 V.
In single device FPP configuration, the DATA[7..0] and DCLK
has to fit the maximum overshoot equation outlined in
“Configuration and JTAG Pin I/O Requirements” on
page
shows the configuration interface connections between the
10kΩ
10–13.
V
CCIO
(1) V
10kΩ
GND
CCIO
CCIO
(1)
or GND.
Cyclone III Device
CONF_DONE
nCONFIG
nSTATUS
nCE
DATA[0] (4)
DCLK (4)
MSEL[3..0]
nCEO
Altera Corporation-Preliminary
N.C. (2)
(3)
10–13.
CC
should be high
March 2007