ep3c120f780c8nes Altera Corporation, ep3c120f780c8nes Datasheet - Page 271
ep3c120f780c8nes
Manufacturer Part Number
ep3c120f780c8nes
Description
Cyclone Iii Device Family
Manufacturer
Altera Corporation
Datasheet
1.EP3C120F780C8NES.pdf
(582 pages)
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Figure 10–9. Single Device AP Configuration Using Spansion S29WS-N Flash Memory
Notes to
(1)
(2)
(3)
(4)
Altera Corporation-Preliminary
March 2007
Connect the pull-up resistors to V
The nCEO pin can be left unconnected or used as a user I/O pin when it does not feed another device’s nCE pin.
The MSEL pin settings vary for different configuration voltage standards and POR time. To connect MSEL[3..0],
refer to
The current implementation for AP configuration ignores the RDY pin. However it is recommended that you connect
this pin.
Figure
Table 10–8 on page
10–9:
From Switch/Button or Other Master Controller
Spansion S29WS-N Flash
1
The default read mode of the supported parallel flash memory is
asynchronous, and all writes to the parallel flash memory are
asynchronous. Both of the parallel flash families support a synchronous
read mode, with data supplied on the positive edge of DCLK. nRESET is
an active-low hard reset, FLASH_nCE is an active-low chip enable, nOE is
an active-low output enable for the DATA[15..0] bus and WAIT/RDY
pin, nAVD is an active-low address valid signal and is used to write
addresses into the flash, and nWE is an active-low write enable and is used
to write data into the flash. The PADD[23..0] bus is the address bus
supplied to the flash. The DATA[15..0] bus is a bidirectional bus used
to supply and read data to and from the flash, with the flash output
controlled by nOE.
10–30. Connect the MSEL pins directly to V
DQ[15:0]
RESET#
CCIO
A[23:0]
AVD#
WE#
RDY
OE#
CLK
CE#
In single device AP configuration, the board trace length
between supported parallel flash to the Cyclone III device
should be within a maximum of 6 inches.
supply of the bank the pin resides in.
Active Parallel Configuration (Supported Flash Memories)
GND
nCE
DCLK
nRESET
FLASH_nCE
nOE
nAVD
nWE
RDY (4)
DATA[15..0]
PADD[23..0]
Cyclone III Device
10k
V
CCIO
Cyclone III Device Handbook, Volume 1
(1) V
CCIO
10k
CCIO
MSEL[3..0]
or GND.
(1)
nCEO
N.C. (2)
(3)
10–35
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