mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 134

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
System Integration Module (SIM)
9.8 SIM Registers
9.8.1 SIM Break Status Register (SBSR)
Data Sheet
134
Note: Writing a logic 0 clears SBSW.
Address:
The SIM has three memory mapped registers.
mapping of these registers.
The SIM break status register contains a flag to indicate that a break
caused an exit from stop or wait mode.
SBSW — SIM Break Stop/Wait Bit
SBSW can be read within the break interrupt routine. The user can
modify the return address on the stack by subtracting one from it. The
following code is an example.
Reset:
Read:
Write:
This status bit is useful in applications requiring a return to wait or stop
mode after exiting from a break interrupt. Clear SBSW by writing a
logic 0 to it. Reset clears SBSW.
1 = Stop mode or wait mode was exited by break interrupt
0 = Stop mode or wait mode was not exited by break interrupt
$FE00
Address
Bit 7
$FE00
$FE01
$FE03
R
Figure 9-19. SIM Break Status Register (SBSR)
System Integration Module (SIM)
Table 9-4. SIM Registers Summary
R
6
R
R
5
Register
SBFCR
SBSR
SRSR
= Reserved
R
4
R
3
Table 9-4
MC68HC908LD64
Freescale Semiconductor
Access Mode
R
2
User
User
User
SBSW
shows the
Note
1
0
Rev. 3.0
Bit 0
R

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