mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 262

• Manufacturer Part Number: mc68hc908ld64
• Description: M68hc08 Microcontrollers Microcontroller
• Manufacturer: Freescale Semiconductor, Inc

Sync Processor
Data Sheet
262
COINV — Clamp Output Invert
BPOR — Back Porch
SOUT — Sync Output Enable
This bit is set to invert the clamp pulse output to negative. Reset
clears this bit.
This bit defines the triggering edge of the clamp pulse output relative
to the HSYNC input. Reset clears this bit.
This bit will select the output signals for the VOUT and HOUT pins and
generate the DE and DCLK signals to the pins. Reset clears this bit.
1 = Clamp output is set for negative pulses
0 = Clamp output is set for positive pulses
1 = Clamp pulse is generated on the trailing edge of HSYNC
0 = Clamp pulse is generated on the leading edge of HSYNC
1 = VOUT, HOUT, DE, and DCLK outputs are internally generated
0 = VOUT and HOUT outputs are processed VSYNC and HSYNC
free-running timing pulses with frequencies determined by
HVCOR[1:0] bits in HVCOR and CGM values.
inputs respectively and DE and DCLK are hold as logic low.
Sync Processor
MC68HC908LD64
Freescale Semiconductor
—
Rev. 3.0