mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 302

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Input/Output (I/O) Ports
19.4.3 Port B Options
Data Sheet
302
Address:
When bit DDRBx is a logic 1, reading address $0001 reads the PTBx
data latch. When bit DDRBx is a logic 0, reading address $0001 reads
the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
the operation of the port B pins.
The PWM control register (PWMCR) selects the port B pins for PWM
function or as standard I/O function. (See
Modulator
PWM7E–PWM0E — PWM Output Enable Bits
Notes:
Reset:
1. X = don’t care.
2. Hi-Z = high impedance.
3. Writing affects data register, but does not affect input.
Read:
Write:
DDRB
Setting a PWMxE bit to logic 1 configures the PTBx/PWMx pin for
PWM output function. Reset clears the PWMxE bits.
Bit
0
1
1 = PTBx/PWMx pin configured as PWMx interrupt pin
0 = PTBx/PWMx pin configured as PTBx standard I/O pin
PWM7E
$0078
Bit 7
PTB Bit
0
Figure 19-9. PWM Control Register (PWMCR)
X
(PWM).)
X
(1)
Input/Output (I/O) Ports
PWM6E
6
0
Table 19-3. Port B Pin Functions
Input, Hi-Z
I/O Pin Mode
Output
PWM5E
5
0
(2)
Accesses to DDRB
PWM4E
4
0
DDRB[7:0]
DDRB[7:0]
Read/Write
PWM3E
Section 12. Pulse Width
3
0
Table 19-3
MC68HC908LD64
PWM2E
Freescale Semiconductor
PTB[7:0]
2
0
Read
Pin
Accesses to PTB
PWM1E
summarizes
1
0
PTB[7:0]
PTB[7:0]
Write
PWM0E
Rev. 3.0
Bit 0
0
(3)

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