mc68hc908ld64 Freescale Semiconductor, Inc, mc68hc908ld64 Datasheet - Page 336

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mc68hc908ld64

Manufacturer Part Number
mc68hc908ld64
Description
M68hc08 Microcontrollers Microcontroller
Manufacturer
Freescale Semiconductor, Inc
Datasheet
Break Module (BRK)
23.3 Features
23.4 Functional Description
Data Sheet
336
Features of the break module include:
When the internal address bus matches the value written in the break
address registers, the break module issues a breakpoint signal to the
CPU. The CPU then loads the instruction register with a software
interrupt instruction (SWI) after completion of the current CPU
instruction. The program counter vectors to $FFFC and $FFFD
($FEFC and $FEFD in monitor mode).
The following events can cause a break interrupt to occur:
When a CPU-generated address matches the contents of the break
address registers, the break interrupt begins after the CPU completes its
current instruction. A return-from-interrupt instruction (RTI) in the break
routine ends the break interrupt and returns the MCU to normal
operation.
Accessible input/output (I/O) registers during the break interrupt
CPU-generated break interrupts
Software-generated break interrupts
COP disabling during break interrupts
A CPU-generated address (the address in the program counter)
matches the contents of the break address registers.
Software writes a logic 1 to the BRKA bit in the break status and
control register.
Figure 23-1
Break Module (BRK)
shows the structure of the break module.
MC68HC908LD64
Freescale Semiconductor
Rev. 3.0

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