at75c220 ATMEL Corporation, at75c220 Datasheet - Page 28
![no-image](/images/manufacturer_photos/0/0/79/atmel_corporation_sml.jpg)
at75c220
Manufacturer Part Number
at75c220
Description
Smart Internet Appliance Processor Siap
Manufacturer
ATMEL Corporation
Datasheet
1.AT75C220.pdf
(144 pages)
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SDRAM_TIMER Register
Register Name: SDRAM_TIMER
Access Type: Read/write
Reset Value: 0x0
•
SDRAM_CFG Register
Register Name: SDRAM_CFG
Access Type: Read/write
Reset Value: 0x0
•
28
CNT
NC
This 12-bit field is loaded into a timer which generates the refresh pulse. Each time the refresh pulse is generated, a
refresh burst is initiated. The length of this refresh burst (number of rows refreshed) can be adjusted at compile time by
modifying the value RFSH_LEN. The refresh commands will begin when the timer is loaded for the first time. The value
to be loaded depends on the clock frequency used in the SDMC configuration module, the refresh rate of the SDRAM
and the refresh burst length where 15.6 microseconds is a typical value for a burst of length one.
Sets the number of column bits. Default is eight column bits.
TWR
TRP
31
23
15
31
23
15
7
7
–
–
–
–
NC
00
01
10
11
30
22
14
30
22
14
6
6
–
–
–
–
AT75C220
CAS
TRCD
Column Bits
29
21
13
29
21
13
5
5
–
–
–
–
10
11
8
9
TRC
28
20
12
28
20
12
NB
4
4
–
–
–
–
CNT
27
19
11
27
19
11
3
3
–
–
–
NR
26
18
10
26
18
10
2
2
–
–
CNT
TRAS
TWR
TRP
25
17
25
17
9
1
9
1
–
–
NC
24
16
24
16
8
0
8
0
–
–
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