at75c220 ATMEL Corporation, at75c220 Datasheet - Page 9

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at75c220

Manufacturer Part Number
at75c220
Description
Smart Internet Appliance Processor Siap
Manufacturer
ATMEL Corporation
Datasheet

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Memory Map
The memory map is divided into regions of 256 megabytes.
The top memory region (0xF000_0000) is reserved and
subdivided for internal memory blocks or peripherals within
the AT75C220. The device can define up to six other active
external memory regions by means of the static memory
controller and SDRAM memory controller. See Table 2.
The memory map is divided between the two ASB buses.
A l l r e g i o n s e x c e p t t h e 1 6 m e g a b y t e s b e t w e e n
0xFB00_0000 and 0xFBFF_FFFF are located on the ARM
ASB bus. Accesses to locations between 0xFB00_0000
and 0xFBFF_FFFF are routed to the MAC ASB bus.
The memory map assumes default values on reset. Exter-
nal memory regions can be reprogrammed to other base
Table 2. AT75C220 Memory Map
Default Base Address
0xFF000000
0xFE000000
0xFD000000
0xFC000000
0xFB000000
0xFA000000
0xF9000000
0x50000000
0x40000000
0x30000000
0x20000000
0x10000000
0x00000000
External/Internal
Region Type
External
External
External
External
External
Internal
Internal
Internal
Internal
Internal
Internal
addresses. For details, see “SMC: Static Memory Control-
ler” on page 16 and “SDMC: SDRAM Controller” on page
24. Note that the internal memory regions have fixed loca-
tions that cannot be reprogrammed.
There are no hardware locks to prevent incorrect program-
ming of the regions. Programming two or more regions to
have the same base address results in undefined behavior.
The ARM reset vector with address 0x00000000 is mapped
to internal ROM or external memory depending on the sig-
nal pin NDSRA/BOOTN. After booting, the ROM region can
be disabled and some external memory such as SDRAM or
Flash can be mapped to the bottom of the memory map by
programming SMC_CS0 or DMC_MR0.
Oak A DPMB (256 x 16 bits)
Frame Buffer (16K x 16 bits)
Reserved (MAC ASB Bus)
Oak A Program RAM
Boot ROM (1 KB)
(24K x 16 bits)
Normal Mode
SDMC_CS1
SDMC_CS0
APB Bridge
SMC_CS3
SMC_CS2
SMC_CS1
SMC_CS0
Reserved
Boot Mode
Boot ROM
0x000003FF
0x00000000
9

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