at75c220 ATMEL Corporation, at75c220 Datasheet - Page 31

• Manufacturer Part Number: at75c220
• Description: Smart Internet Appliance Processor Siap
• Manufacturer: ATMEL Corporation

Arbitration Using Multi-layer AMBA
The AT75C220 has two separate ASB (multi-layer AMBA)
buses that can be decoupled during most normal opera-
tions. The ability to couple the two ASB buses is provided
to allow the ARM to receive and transmit Ethernet frames
via the two Ethernet MACs.
The ARM bus is the main processor bus to which most
peripherals are connected.
The MAC bus is used exclusively for Ethernet traffic.
An ASB-ASB bridge that is transparent to the other devices
on the bus connects the two ASB buses. Figure 11 shows
the connection between the two buses.
Figure 11. ASB - ASB Bridge
The ASB-ASB bridge consists of two channels: the first is a
master on the MAC bus and a slave on the ARM bus. The
second channel is a master on the ARM bus and a slave on
the MAC bus.
The ARM7TDMI is the default master and always requests
the bus. It is always granted the bus in absence of a
request from another master.
The MAC ASB has two priority levels, the two MACs share
low priority access and the bridge has high priority. The
MACs do not burst more than four words per access and
release the bus request between accesses so the MACs
can share a priority level with a simple round-robin arbitra-
tion scheme.
The ARM is likely to be the only master accessing the MAC
bus via the bridge and should not perform more than a cou-
ple of cycles before releasing the MAC bus. Care should be
taken to prevent other masters on the ARM bus holding the
Arbiter
MAC
Master
Slave
ASB - ASB Bridge
ASB (ARM)
ASB (MAC)
Master
Slave
Arbiter
ARM
MAC bus for more than a few cycles. Otherwise, the MACs
drop frames due to FIFO overflow or underflow.
Coupled Bus Operation
When a master on one bus accesses a slave on the other
bus, the following operations occur:
• The master arbitrates for the local ASB bus if it does not
• When the local bus arbiter grants the master the local
• The bridge is selected as the slave on the local bus and
• When the bridge is granted the remote bus, the two ASB
ASB-ASB Bridge Timing
The AMBA ASB performs pipelined arbitration. The bridge
can only request the bus when the address of the slave is
available. For this reason, the bridge must insert a wait
cycle during the arbitration cycle on the remote bus
because it cannot request the bus early. Figure 12 shows a
write cycle from a master on the ARM bus to a slave on the
MAC bus. The slave does not add wait states. All cycles
operate in the same way as the write cycle until the buses
a r e c o u p l e d w h e n t h e o p e r a t i o n b e c o m e s s l a v e -
dependent.
Deadlock
Deadlock is avoided by forcing the ARM processor to
release the bus if both the ARM and one of the MACs
request the bridge at the same time. The bridge responds
to the ARM with a signal to force the ARM to retry the oper-
ation later. The MAC can complete its access and release
the bus in the normal way.
Deadlock can still occur if a master that does not support
retract attempts to access the MAC bus at the same time
as one of the MACs is requesting the ARM bus. This situa-
tion is avoided if only the ARM is used to access the MAC
bus.
already have access to the bus.
bus, the master initiates a cycle with an address
corresponding to a slave on the remote bus.
responds by inserting wait cycles. The bridge also
requests the remote bus from the remote bus arbiter.
buses are coupled and the transfer completes.
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