at75c220 ATMEL Corporation, at75c220 Datasheet - Page 75
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at75c220
Manufacturer Part Number
at75c220
Description
Smart Internet Appliance Processor Siap
Manufacturer
ATMEL Corporation
Datasheet
1.AT75C220.pdf
(144 pages)
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Table 22. USART External Signals
Note:
Baud Rate Generator
The baud rate generator provides the bit period clock (the
baud rate clock) to both the receiver and the transmitter.
The baud rate generator can select between external and
internal clock sources. The external clock source is SCK.
The internal clock sources can be either the master clock
ACLK or the master clock divided by 8 (ACLK/8).
Note:
When the USART is programmed to operate in asynchro-
nous mode (SYNC = 0 in the Mode Register US_MR), the
selected clock is divided by 16 times the value (CD) written
i n US _ B R G R ( B a u d Ra t e G e ne r at o r R eg i s t e r ) . I f
US_BRGR is set to 0, the baud rate clock is disabled.
When the USART is programmed to operate in synchro-
nous mode (SYNC = 1) and the selected clock is internal
(USCLKS[1] = 0 in the Mode Register US_MR), the baud
rate clock is the internal selected clock divided by the value
written in US_BRGR. If US_BRGR is set to 0, the baud rate
clock is disabled.
In synchronous mode with external clock selected
(USCLKS[1] = 1), the clock is provided directly by the sig-
Table 23. Clock Generator Table
Signal Name
NRTS
NCTS
NDTR
NDSR
NDCD
NRI
Required Baud Rate
(bps)
9600
19200
Baud Rate
Baud Rate
After a hardware reset, the USART SC and modem pins are not enabled by default (see “PIO: Programmable I/O Controller” on
page 63).
In all cases, if an external clock is used, the duration of
each of its levels must be longer than the system clock
(ACLK) period. The external clock frequency must be at
least 2.5 times lower than the system clock.
=
=
Description
Request to Send
Clear to Send
Data Terminal Ready
Data Set Ready
Data Carrier Detect
Ring Indicator
Selected Clock
Selected Clock
16 x CD
CD
16 x baud rate
CD = 24 x 10
156.25
78.125
6
/
Actual CD
156
78
Actual Baud Rate (bps)
nal on the SCK pin. No division is active. The value written
in US_BRGR has no effect.
19230.8
9615.4
Error (bps)
30.8
15.4
Output
Output
Type
Input
Input
Input
Input
% Error
0.16
0.16
75
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