adau1781bcpz-rl Analog Devices, Inc., adau1781bcpz-rl Datasheet - Page 24

• Manufacturer Part Number: adau1781bcpz-rl
• Description: Low Noise Stereo Codec With Sigmadsp Processing Core
• Manufacturer: Analog Devices, Inc.

ADAU1781
THEORY OF OPERATION
The ADAU1781 is a low power audio codec with an integrated,
programmable SigmaDSP audio processing core. It is an all-in-one
package that offers high quality audio, low power, small size, and
many advanced features. The stereo ADC and stereo DAC each
have a dynamic range (DNR) performance of at least 96.5 dB and
a total harmonic distortion plus noise (THD + N) performance
of at least −90 dB. The serial data port is compatible with I
justified, right-justified, and TDM modes for interfacing to digital
audio data. The operating voltage range is 1.8 V to 3.65 V, with
an on-board regulator generating the internal digital supply voltage.
The record path includes very flexible input configurations that
can accept differential or single-ended analog microphone inputs
as well as two stereo digital microphone inputs. There is also a
beep input pin (BEEP) dedicated to analog beep signals that are
common in digital still camera applications. A microphone bias
pin that can power electrets-type microphones is also available.
Each input signal has its own programmable gain amplifier (PGA)
for input volume adjustment. An automatic level control (ALC)
can be implemented in the SigmaDSP audio processing core to
maintain a constant input recording volume.
The ADCs and DACs are high quality, 24-bit Σ-Δ converters
that operate at selectable 64× or 128× oversampling rates. The
base sampling rate of the converters is set by the input clock rate
and can be further scaled with the converter control register
settings. The converters can operate at sampling frequencies
from 8 kHz to 96 kHz. The ADCs and DACs also include very
fine-step digital volume controls.
2
S, left-
Rev. 0 | Page 24 of 88
The playback path allows input signals and DAC outputs to be
mixed into speaker and/or line outputs. The speaker driver is
capable of driving 400 mW into an 8 Ω load.
The SigmaDSP audio processing core can be programmed to
enhance the audio quality and improve the end-user experience.
The flexibility offered by the SigmaDSP core allows this codec
to be used for a wide variety of low power applications. Signal
processing blocks available for use in the SigmaDSP core include
the following:
•
•
•
•
•
•
•
•
•
•
•
The ADAU1781 can generate its internal clocks from a wide
range of input clocks by using the on-board fractional PLL.
The PLL accepts inputs from 11 MHz to 20 MHz.
The ADAU1781 is provided in a small, 32-lead, 5 mm × 5 mm lead
frame chip scale package (LFCSP) with an exposed bottom pad.
Dynamics processing, including compressors, expanders,
gates, and limiters
Chime, tone, and noise generators
Enhanced stereo capture (ESC)
Wind noise detection and filtering
Stereo spatialization
Dynamic bass
Loudness
Filtering, including crossover, equalization, and notch
GPIO controls
Mixers and multiplexers
Volume controls and mute