adau1781bcpz-rl Analog Devices, Inc., adau1781bcpz-rl Datasheet - Page 73

• Manufacturer Part Number: adau1781bcpz-rl
• Description: Low Noise Stereo Codec With Sigmadsp Processing Core
• Manufacturer: Analog Devices, Inc.

Register 16426 (0x402A), DAC Control
Bits[7:6], Mono Mode
These bits control the output mode of the DAC. Setting these
bits to 00 outputs two distinct channels, left and right. Setting
these bits to 01 outputs the left input channel on both the left
and right outputs, and the right input channel is lost. Setting
these bits to 10 outputs the right input channel on both the left
and right outputs, and the left input channel is lost. Setting these
bits to 11 mixes the left and right input channels and outputs
the mixed mono signal on both the left and right outputs.
Table 62. DAC Control Register
Bits
[7:6]
5
[4:3]
2
[1:0]
Description
Mono mode
00: stereo output
01: both output left channel
10: both output right channel
11: both output left/right mix
Invert input polarity
0: normal
1: inverted
Reserved
DAC de-emphasis filter enable
0: disabled
1: enabled
DAC enable
00: both off
01: left on
10: right on
11: both on
Rev. 0| Page 73 of 88
Bit 5, Invert Input Polarity
This bit applies a gain of −1, or a 180° phase shift, to the DAC
output signal.
Bit 2, DAC De-Emphasis Filter Enable
This bit enables a de-emphasis filter and should be used when a
preemphasized signal is input to the DACs.
Bits[1:0], DAC Enable
These bits allow the DACs to be individually enabled or disabled.
Disabling unused DACs can result in significant power savings.
Default
00
0
0
00
ADAU1781