aduc7062 Analog Devices, Inc., aduc7062 Datasheet - Page 40

• Manufacturer Part Number: aduc7062
• Description: Low-power, Precision Analog Microcontroller, Dual ?-? Adcs, Flash/ee, Arm7tdmi
• Manufacturer: Analog Devices, Inc.

ADuC7060/ADuC7061/ADuC7062
ADC Configuration Register
Name:
Address:
Default Value:
Access:
Function:
Table 39. ADCCFG MMR Bit Designations
Bit
7
6, 5
4, 3
2
1
0
Name
GNDSW_EN
ADC0ACCEN[1:0]
ADC0CMPEN[1:0]
ADC0OREN
GNDSW_RES_EN
ADCRCEN
ADCCFG
0xFFFF0518
0x00
Read/write
The 8-bit ADC configuration MMR controls extended functionality related to the on-chip ADCs.
Primary ADC Comparator Enable bit.
Set to 1 to enable 20 kΩ resistor in series with the ground switch.
Description
Analog Ground Switch Enable.
This bit is set to 1 by user software to connect the external GND_SW pin to an internal analog ground reference
point. This bit can be used to connect and disconnect external circuits and components to ground under
program control and thereby minimize dc current consumption when the external circuit or component is not
being used. This bit is used in conjunction with ADCCFG[1] to select a 20 kΩ resistor to ground.
When this bit is cleared, the analog ground switch is disconnected from the external pin.
Primary Channel (32-Bit) Accumulator Enable.
[00] = Accumulator disabled and reset to 0.
The accumulator must be disabled for a full ADC conversion, (ADCSTA[0] set twice) before the accumulator can
be re-enabled to ensure the accumulator is reset.
[01] = Accumulator active.
Positive current values are added to the accumulator total; the accumulator can overflow if allowed to run for
>65,535 conversions.
Negative current values are subtracted from the accumulator total; the accumulator is clamped to a minimum
value of 0.
[10] = Accumulator active. Same as [01] except there is no clamp.
Positive current values are added to the accumulator total; the accumulator can overflow if allowed to run for
>65,535 conversions.
The absolute values of negative current are subtracted from the accumulator total; the accumulator in this mode
continues to accumulate negatively, below 0.
[11] = Accumulator + Comparator Active. This causes an ADC0 interrupt if ADCMSK[6] is set.
ADC0 Overrange Enable.
Set by user to enable a coarse comparator on the Primary Channel ADC. If the reading is grossly (>30% approx.)
overrange for the active gain setting, then the overrange bit in the ADCSTA MMR is set. The ADC reading must be
outside this range for greater than 125 μs for the flag to be set.
This feature should not be used in ADC low power mode.(TBC)
Clear this bit to disable this resistor.
ADC Result Counter Enable.
Set by user to enable the result count mode. ADC interrupts occur if ADCORCR = ADCORCV.
Cleared to disable Result counter. ADC interrupts occur after every conversion.
[00] = Comparator disabled.
[01] = Comparator active. Interrupt asserted if absolute value of ADC0 conversion result |I| ≥ ADCOTHRESH.
[10] = Comparator Count mode active. Interrupt asserted if absolute value of an ADC0 conversion result |I| ≥
ADCOTHRESH for the number of ADCOTHCNT conversions. A conversion value |I| < ADCOTHRESH resets the
threshold counter value (ADCOTHVAL) to 0.
[11] = comparator count mode active, interrupt asserted if absolute value of an ADC0 conversion result |I| ≥
ADCOTHRESH for the number of ADCOTHCNT conversions. A conversion value |I| < ADCOTHRESH decrements
the threshold counter value (ADCOTHVAL) towards 0.
Rev. PrA | Page 40 of 100
Preliminary Technical Data