aduc7062 Analog Devices, Inc., aduc7062 Datasheet - Page 41

• Manufacturer Part Number: aduc7062
• Description: Low-power, Precision Analog Microcontroller, Dual ?-? Adcs, Flash/ee, Arm7tdmi
• Manufacturer: Analog Devices, Inc.

Preliminary Technical Data
Primary Channel ADC Data Register
Name:
Address:
Default Value:
Access:
Function:
Table 40. ADC0DAT MMR Bit Designations
Bits
23 to 0
Auxiliary Channel ADC Data Register
Name:
Address:
Default Value:
Access:
Function:
Table 41. ADC1DAT MMR Bit Designations
Bits
23 to 0
Primary Channel ADC Offset Calibration Register
Name:
Address:
Default Value:
Access:
Function:
Table 42. ADC0OF MMR Bit Designations
Bits
15 to 0
Description
ADC0 24/16-bit conversion result
Description
ADC1 24-bit conversion result
Description
ADC0 16-bit calibration offset value.
ADC0DAT
0xFFFF051C
0x0000-0000
Read only
This ADC Data MMR holds the 24/16-bit conversion result from the primary ADC. The ADC does not update this
MMR if the ADC0 conversion result ready bit (ADCSTA[0]) is set. A read of this MMR by the MCU clears all asserted
ready flags (ADCSTA[2:0]).
ADC1DAT
0xFFFF0520
0x0000-0000
Read only
This ADC Data MMR holds the 24-bit conversion result from the Auxiliary ADC. The ADC does not update this
MMR if the ADC0 conversion result ready bit (ADCSTA[1]) is set. A read of this MMR by the MCU clears all asserted
ready flags (ADCSTA[2:1]).
ADC0OF
0xFFFF0524
Part specific, factory programmed
Read/write access
This ADC offset MMR holds a 16-bit offset calibration coefficient for the Primary ADC. The register is configured at
power-on with a factory default value. However, this register automatically overwrites if an offset calibration of the
Primary ADC is initiated by the user via bits in the ADCMDE MMR. User code can only write to this calibration
register if the ADC is in idle mode. An ADC must be enabled and in idle mode before being written to any offset or
gain register. The ADC must be in idle mode for at least 23 μs.
Rev. PrA | Page 41 of 100
ADuC7060/ADuC7061/ADuC7062