aduc7062 Analog Devices, Inc., aduc7062 Datasheet - Page 44
aduc7062
Manufacturer Part Number
aduc7062
Description
Low-power, Precision Analog Microcontroller, Dual ?-? Adcs, Flash/ee, Arm7tdmi
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7062.pdf
(100 pages)
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ADuC7060/ADuC7061/ADuC7062
Primary Channel ADC Threshold Register
Name:
Address:
Default Value:
Access:
Function:
Table 48. ADCOTHRESH MMR Bit Designations
Bits
15 to 0
Primary Channel ADC Threshold Count Limit Register
Name:
Address:
Default Value:
Access:
Function:
Table 49. ADCOTHCNT MMR Bit Designations
Bits
7 to 0
Primary Channel ADC Threshold count Register
Name:
Address:
Default Value:
Access:
Function:
Table 50. ADCOTHVAL MMR Bit Designations
Bits
7 to 0
Description
ADC0 16-bit comparator threshold register.
Description
ADC0 8-bit threshold counter limit register.
Description
ADC0 8-bit threshold exceeded counter register.
ADCOTHRESH
0xFFFF053C
0x0000
Read/write
This 16-bit MMR sets the threshold against which the absolute value of the Primary ADC conversion result is
compared. In Unipolar mode ADC0TH[15:0] are compared, and in twos complement mode, ADC0TH[14:0] are
compared.
ADCOTHCNT
0xFFFF0540
0x01
Read/write
This 8-bit MMR determines how many cumulative (values below the threshold decrement or reset the count to 0)
primary ADC conversion result readings above ADC0TH must occur before the primary ADC comparator threshold
bit is set in the ADCSTA MMR generating an ADC interrupt. The primary ADC comparator threshold bit is asserted
as soon as the ADC0THV = ADC0TCL.
ADCOTHVAL
0xFFFF0544
0x00
Read only
This 8-bit MMR is incremented every time the absolute value of a primary ADC conversion result |Result| ≥
ADC0TH. This register is decremented or reset to 0 every time the absolute value of a primary ADC conversion result
|Result| < ADC0TH. The configuration of this function is enabled via the primary channel ADC comparator bits in
the ADCCFG MMR.
Rev. PrA | Page 44 of 100
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