aduc7062 Analog Devices, Inc., aduc7062 Datasheet - Page 66

• Manufacturer Part Number: aduc7062
• Description: Low-power, Precision Analog Microcontroller, Dual ?-? Adcs, Flash/ee, Arm7tdmi
• Manufacturer: Analog Devices, Inc.

ADuC7060/ADuC7061/ADuC7062
Timer2 Control Register
Name:
Address:
Default value:
Access:
Function:
Table 76 T2CON MMR Bit Designations
Bit
15 to 9
8
7
6
5
4
3 to 2
1
0
Name
T2DIR
T2EN
T2MOD
WDOGMDEN
WDOGENI
T2PDOFF
T2CON
0xFFFF0368
0x0000
Read/write
The 16-bit MMR configures the mode of operation of Timer2 as is described in detail in Table 76.
Description
Reserved. These bits are reserved and should be written as 0 by user code.
Count Up/Count Down Enable.
Set by user code to configure Timer2 to count up.
Cleared by user code to configure Timer2 to count down.
Timer2 Enable.
Set by user code to enable Timer2.
Cleared by user code to disable Timer2.
Timer2 Operating Mode.
Set by user code to configure Timer2 to operate in periodic mode.
Cleared by user to configure Timer2 to operate in free running mode.
Watchdog Timer Mode Enable.
Set by user code to enable watchdog mode.
Cleared by user code to disable watchdog mode.
Reserved. This bit is reserved and should be written as 0 by user code.
Timer2 Clock (32.768 kHz) Prescaler.
00 = 32.768 kHz (default)
01 = source clock/16.
10 = source clock/256.
11 = reserved.
Watchdog Timer IRQ Enable.
Set by user code to produce an IRQ instead of a reset when the watchdog reaches 0.
Cleared by user code to disable the IRQ option.
Stop Timer2 when Power Down is Enabled.
Set by the user code to stop Timer2 when the peripherals are powered down using Bit 4 in the POWCON MMR.
Cleared by the user code to enable Timer2 when the peripherals are powered down using Bit 4 in the
POWCON MMR.
Rev. PrA | Page 66 of 100
Preliminary Technical Data