aduc7062 Analog Devices, Inc., aduc7062 Datasheet - Page 95
aduc7062
Manufacturer Part Number
aduc7062
Description
Low-power, Precision Analog Microcontroller, Dual ?-? Adcs, Flash/ee, Arm7tdmi
Manufacturer
Analog Devices, Inc.
Datasheet
1.ADUC7062.pdf
(100 pages)
- Current page: 95 of 100
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Preliminary Technical Data
Table 108. GPxSET MMR Bit Descriptions
Bit
31:24
23:16
15:0
GPXCLR REGISTERS
GPxCLR are data clear Port x registers.
Table 109. GPxCLR Registers
Name
GP0CLR
GP1CLR
GP2CLR
Table 110. GPxCLR MMR Bit Descriptions
Bit
31:24
23:16
15:0
Description
Reserved.
Data Port x Set Bit.
Reserved.
Description
Reserved.
Data Port x Clear Bit.
Reserved.
Set to 1 by user to clear the bit on Port x; also clears
the corresponding bit in the GPxDAT MMR.
Cleared to 0 by user; does not affect the data output.
Set to 1 by user to set bit on Port x; also sets the
corresponding bit in the GPxDAT MMR.
Cleared to 0 by user; does not affect the data output.
Address
0xFFFF0D28
0xFFFF0D38
0xFFFF0D48
Default Value
0x000000XX
0x000000XX
0x000000XX
Access
W
W
W
Rev. PrA | Page 95 of 100
GPxPAR REGISTERS
The GPxPAR registers program the parameters for Port 0 and
Port 1. Note that the GPxDAT MMR must always be written
after changing the GPxPAR MMR.
Table 111. GPxPAR Registers
Name
GP0PAR
GP1PAR
GP2PAR
Table 112. GPxPAR MMR Bit Descriptions
Bit
31:15
23:16
15:8
7:0
Name
GPL[7:0]
GPDS[7:0]
GPPD[7:0]
ADuC7060/ADuC7061/ADuC7062
Address
0xFFFF0D2C
0xFFFF0D3C
0xFFFF0D4C
Description
Reserved.
General I/O Port Pin Functionality Lock
Registers.
Drive Strength Configuration. This bit is
configurable.
Pull-Up Disable Px[7:0].
GPL[7:0] = 0, normal operation.
GPL[7:0] = 1, for each GPIO pin, if this bit is
set, writing to the corresponding bit in
GPxCON or GPxDAT register bit will have
no effect. {Is this phrasing correct?}
GPDS[x] = 0, maximum source current is
2 mA.
GPDS[x] = 1, maximum source current is
4 mA.
GPPD[x] = 0, pull-up resistor is active.
GPPD[x] = 1, pull-up resistor is disabled.
Default Value
0x00000000
0x00000000
0x00000000
Access
R/W
R/W
R/W
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