peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 19
![no-image](/images/no-image-200.jpg)
peb3456e
Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456E.pdf
(424 pages)
- Current page: 19 of 424
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List of Tables
Table 4-1
Table 4-2
Table 4-3
Table 4-4
Table 4-5
Table 4-6
Table 4-7
Table 4-8
Table 4-9
Table 4-10
Table 4-11
Table 4-12
Table 4-13
Table 4-14
Table 4-15
Table 5-1
Table 5-2
Table 5-3
Table 5-4
Table 5-5
Table 6-1
Table 8-1
Table 8-2
Table 8-3
Table 8-4
Table 8-5
Table 8-6
Table 8-7
Table 8-8
Table 8-9
Table 8-10
Table 8-11
Table 8-12
Table 8-13
Table 8-14
Table 8-15
Table 8-16
Table 8-17
Table 8-18
Table 8-19
Table 8-20
Data Sheet
158
Receive Descriptor Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 61
Transmit Descriptor Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 67
Example for little/big Endian with BNO = 3 . . . . . . . . . . . . . . . . . . . . . 72
Example for little big Endian with BNO = 7 . . . . . . . . . . . . . . . . . . . . . 72
4-Frame Multiframe Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 79
ESF Multiframe Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 80
SF Multiframe Structure . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 85
Allocation of Bits 1 to 8 of Time slot 0 . . . . . . . . . . . . . . . . . . . . . . . . . 90
CRC-4 Multiframe Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 92
Summary of Alarm Detection and Alarm Release . . . . . . . . . . . . . . . . 98
M12 multiplex format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 109
ITU-T G.747 format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 111
M23 multiplex format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 113
C-bit parity format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 116
Interrupt Vector Structure. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 125
Correspondence between PCI memory space and chip select . . . . . 152
C/BE to LA/LBHE mapping in Intel bus mode (8 bit port mode) . . . . 155
C/BE to LA/LBHE mapping in Intel bus mode (16 bit port mode) . . . 155
C/BE to LA/LSIZE0 mapping in Motorola bus mode (8 bit port mode) 158
C/BE to LA/LSIZE0 mapping in Motorola bus mode (16 bit port mode) . .
Channel Specification Registers and Channel Commands . . . . . . . . 163
PCI Configuration Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 171
PCI Slave Register Set . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 173
PCI and Local Bus Slave Register Set . . . . . . . . . . . . . . . . . . . . . . . 175
Transmit T1/E1 Framer Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . 180
Receive T1/E1 Framer Registers. . . . . . . . . . . . . . . . . . . . . . . . . . . . 181
Facility Data Link Registers . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 182
Threshold Codings . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 209
DS3 Status Signal Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
DS3 Transmit Overhead Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
DS3 Receive Overhead Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
DS3 Transmit Stuff Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
DS3 Receive Stuff Bit Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
T1/E1 Tributary Clock Input Timing . . . . . . . . . . . . . . . . . . . . . . . . . . 215
T1/E1 Tributary Synchronization Timing . . . . . . . . . . . . . . . . . . . . . . 215
T1/E1 Test Transmit Clock Timing. . . . . . . . . . . . . . . . . . . . . . . . . . . 215
T1/E1 Test Transmit Data Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
T1/E1 Test Receive Clock Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
Test T1/E1 Receive Data Timing . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
M12 multiplex format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
ITU-T G.747 format . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . . 215
19
PEB 3456 E
05.2001
Page
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