peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 373
![no-image](/images/no-image-200.jpg)
peb3456e
Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456E.pdf
(424 pages)
- Current page: 373 of 424
- Download datasheet (6Mb)
OBI
XHF
XTF
XME
•
Data Sheet
1
Odd Byte Count Indicator
Setting this bit together with bit XME indicates the number of bytes
written to XFF.XFIFO is odd. This means the lower byte of the last write
transfer to the transmit FIFO is valid only. In HDLC mode the status byte
written to transmit FIFO must be included in calculation.
0
1
Transmit HDLC frame
Setting this bit indicates that the contents written to XFF.XFIFO shall be
transmitted as HDLC frame. If data written to XFF.XFIFO completes a
HDLC frame, bit XME must be set together with XHF in order to generate
CRC and flag.
0
1
Transmit transparent frame
Setting this bit indicates that the contents written to XFF.XFIFO shall be
transmitted in transparent mode.
0
1
Transmit Message End
Setting this bit indicates that the last data block written to XFF.XFIFO
completes the current frame. The last byte of the data block written to the
transmit FIFO is a status word indicating the message status. The
signalling controller terminates the transmission properly by appending
CRC and the closing flag to the data sequence if the status word written
as the last entry to the transmit FIFO does not contain an abort
indication.
Enable cyclic transmission.
Even number of bytes stored in XFF.XFIFO.
Odd number of bytes stored in XFF.XFIFO.
No function
Transmit data stored in XFF.XFIFO in HDLC format.
No function
Transmit data stored in XFF.XFIFO fully transparent, i.e. without
bit stuffing and CRC.
373
Register Description
PEB 3456 E
05.2001
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