peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 198
![no-image](/images/no-image-200.jpg)
peb3456e
Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456E.pdf
(424 pages)
- Current page: 198 of 424
- Download datasheet (6Mb)
8.2.2
CSPEC_CMD
Channel Specification Command Register
Access
Address
Reset Value
The channel specification registers are the access registers to the chip internal channel
database. In order to program or reprogram a channel the channel information must be
setup in the channel specification data registers before a channel command can be
given. As soon as the channel command is issued the channel information is copied to
the chip internal channel database and the device is reconfigured for the intended
operation. Since reconfiguration time is dependent on the given command, certain
commands generate acknowledge/fail command interrupt vectors to report status of
configuration.During this time (command has been given and command interrupt) no
further commands are allowed for the same channel. Please note that any command for
one channel does not affect operation of any other channel.
For configuration of multiple channels the system software needs to program the
channel data registers only once and then can issue channel commands for multiple
channels without reprogramming the channel data registers.
Note: Debugging of channel information using the commands ’Receive Debug’ or
For detailed description of register concept and command concept refer to chapter
“Channel Programming / Reprogramming Concept” on Page
Data Sheet
31
15
0
’Transmit Debug’ requires new programming of channel data registers for further
operation.
0
PCI Slave Register
0
: read/write
: 000
: 00000000
CMDX(7:0)
0
H
0
H
0
0
24
0
198
23
7
CMDR(7:0)
CHAN(7:0)
Register Description
163.
PEB 3456 E
05.2001
16
0
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