peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 26
![no-image](/images/no-image-200.jpg)
peb3456e
Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456E.pdf
(424 pages)
- Current page: 26 of 424
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transferred to the packet RAM via the PCI bus and handled (e.g. for layer3 protocol
handling) by the line card processor. An external processor provides control of the
integrated T1/E1 framer, M13 multiplexer, DS3 framer and the signalling channels. A
mailbox allows the transfer of information between both CPUs.
•
Figure 1-2
Data Sheet
Back plane
Route r
System Integration of the TE3-CHATT
Processor
Conne ction
Back plane
Linecard
Packet
RAM
Bus
PCI
26
Local CPU
TE3-CHATT
T3 Linecard
TE3-CHATT Overview
DS3 LIU
PEB 3456 E
05.2001
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