peb3456e Infineon Technologies Corporation, peb3456e Datasheet - Page 306
![no-image](/images/no-image-200.jpg)
peb3456e
Manufacturer Part Number
peb3456e
Description
Channelized T3 Termination, With Ds3 Framer, M13 Multiplexer, T1/e1 Framers And 256-channel Hdlc/ppp Controller
Manufacturer
Infineon Technologies Corporation
Datasheet
1.PEB3456E.pdf
(424 pages)
- Current page: 306 of 424
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D2RAP
DS2 Receive Alarm Timer Parameters
Access
Address
Reset Value
AIS
CM
Data Sheet
15
0
0
0
: read/write
: 240
: 00
AIS criteria
This bits sets the error rate for AIS detection. Declaration of AIS is
specified by bits CM and CV.
ITU-T G.747:
0
1
M12 format:
0
1
Counter Mode
This bit selects the alarm timer mode. If counter mode is set to
multiframes (‘0’) the value in CV determines the number of multiframes
after which the TE3-CHATT declares AIS or RED. When counter mode
is set to ‘½ milliseconds’ (‘1’) the value in CV determines the time in CV
x 0.5 ms after which AIS or RED is declared.
0
1
0
H
H
(PCI), A0
AIS condition is recognized when the alarm indication signal is
received with less than 5 errors in each of 2 consecutive
multiframes.
AIS condition is recognized when the alarm indication signal is
received with less than 9 errors in each of 2 consecutive
multiframes.
AIS condition is recognized when the alarm indication signal is
received with less than 3 errors in 3156 bits.
AIS condition is recognized when the alarm indication signal is
received with less than 9 errors in 3156 bits.
Multiframes.
½ Milliseconds.
0
0
H
(Local bus)
0
0
306
AIS
7
CM
6
5
Register Description
CV(5:0)
PEB 3456 E
05.2001
0
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