tmp88cs43fg TOSHIBA Semiconductor CORPORATION, tmp88cs43fg Datasheet - Page 143

• Manufacturer Part Number: tmp88cs43fg
• Description: 8 Bit Microcontroller Tlcs-870/x Series
• Manufacturer: TOSHIBA Semiconductor CORPORATION

Position Detection Circuit Registers [Addresses (PMD1 and PMD2)]
(01FA2H)
(01FD2H)
(01FA1H)
(01FD1H)
(01FA0H)
(01FD0H)
PDCRC
PDCRB
PDCRA
Note: When changing setting, keep the PDCEN bit reset to “0” (disable position detection function).
Note: Read-modify-write instructions, such as a bit manipulation instruction, cannot access the PDCRA because it contains a
write only bit.
2 to 0
3 to 0
5, 4
7, 6
5, 4
SWSTP
3
7
6
5
4
3
2
1
0
7
–
7
7
SPLCK
EMEM
SMON
PDTCT
SPLCK
SPLMD
PDCMP
SWSTP
SWSTT
SPTM3
STTM2
PDNUM
RCEN
DTMD
PDCEN
SWSTT
6
–
6
6
SPTM3
Hold result of position detection
at PWM edge (Detect position
detected position)
Monitor sampling status
Hold position signal input sta-
tus
Select sampling input clock
Sampling mode
Position detection matched
counts
Stop sampling in software
Start sampling in software
Stop sampling using Timer 3
Start sampling using Timer 2
Number of position signal input
pins
Recount occurrences of match-
ing when PWM is on
Position detection mode
Enable/Disable position detec-
tion function
5
5
5
SPLMD
EMEM
STTM2
4
4
4
PDNUM
SMON
3
3
3
Page 133
00: Detected in the current pulse
01: Detected while PWM off
10: Detected in the current pulse
11: Detected in the preceding pulse
0: Sampling idle
1: Sampling in progress
Holds the status of the position signal input during unmatch detection
mode. Bits 2 to 0 correspond to W, V, and U phases.
00: fc/2
01: fc/2
10: fc/2
11: fc/2
00: Sample when PWM is on
01: Sample regularly
10: Sample when lower phases conducting current
11: Reserved
1 to 15 times (Counts 0 and 1 are assumed to be one time.)
0: No operation
1: Stop sampling
0: No operation
1: Start sampling
0: Disable
1: Enable
0: Disable
1: Enable
0: Compare three pins (PDU/PDV/PDW)
1: Compare one pin (PDU) only
0: Continue counting from previously PWM on
1: Recount each time PWM turns on
0: Ordinary mode
1: Unmatch detection mode
0: Disable
1: Enable (Sampling starts)
RCEN
2
2
2
PDCMP
5
2
3
4
[Hz] (200 ns at 20 MHz)
PDTCT
DTMD
(400 ns at 20 MHz)
(800 ns at 20 MHz)
(1.6 μs at 20 MHz)
1
1
1
PDCEN
0
0
0
(Initial value: **00 0000)
(Initial value: 0000 0000)
(Initial value: 0000 0000)
TMP88CS43FG
R/W
R/W
W
R