tmp88cs43fg TOSHIBA Semiconductor CORPORATION, tmp88cs43fg Datasheet - Page 176

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tmp88cs43fg

Manufacturer Part Number
tmp88cs43fg
Description
8 Bit Microcontroller Tlcs-870/x Series
Manufacturer
TOSHIBA Semiconductor CORPORATION
Datasheet
14. Asynchronous Serial interface (UART)
14.2 Control
14.2 Control
UART Control Register2
UART Control Register1
UARTCRB
UARTCRA
(01F92H)
(01F91H)
itored using the UART status register (UARTSR).
UART is controlled by the UART Control Registers (UARTCRA, UARTCRB). The operating status can be mon-
TXD pin and RXD pin can be selected a port assignment by UART Pin Select Register (UARTSEL).
Note 1: When operations are disabled by setting UARTCRA<TXE and RXE> bits to “0”, the setting becomes valid when data
Note 2: The transmit clock and the parity are common to transmit and receive.
Note 3: UARTCRA<RXE> and UARTCRA<TXE> should be set to “0” before UARTCRA<BRG> is changed.
Note 4: In case fc = 20MHz, the timer counter 4 (TC4) is available as a baud rate generator.
Note: When UARTCRB<RXDNC> = “01”, pulses longer than 96/fc [s] are always regarded as signals; when UART-
CRB<RXDNC> = “10”, longer than 192/fc [s]; and when UARTCRB<RXDNC> = “11”, longer than 384/fc [s].
TXE
transmit or receive complete. When the transmit data is stored in the transmit data buffer, the data are not transmitted.
Even if data transmit is enabled, until new data are written to the transmit data buffer, the current data are not transmitted.
STOPBR
RXDNC
7
7
EVEN
STBT
BRG
TXE
RXE
PE
RXE
6
6
Selection of RXD input noise
rejectio time
Receive stop bit length
Transfer operation
Receive operation
Transmit stop bit length
Even-numbered parity
Parity addition
Transmit clock select
STBT
5
5
EVEN
4
4
PE
3
3
2
2
RXDNC
Page 166
000:
001:
010:
100:
101:
011:
110:
111:
00:
01:
10:
11:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
0:
1:
BRG
1
1
No noise rejection (Hysteresis input)
Rejects pulses shorter than 31/fc [s] as noise
Rejects pulses shorter than 63/fc [s] as noise
Rejects pulses shorter than 127/fc [s] as noise
1 bit
2 bits
Disable
Enable
Disable
Enable
1 bit
2 bits
Odd-numbered parity
Even-numbered parity
No parity
Parity
fc/13 [Hz]
fc/26
fc/52
fc/104
fc/208
fc/416
Input INTTC4
fc/96
STOPBR
0
0
(Initial value: 0000 0000)
(Initial value: **** *000)
TMP88CS43FG
Write
Write
only
only

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