at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 176

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at91sam9g20-cu

Manufacturer Part Number
at91sam9g20-cu
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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21.9.4
Read to Write Wait State
Due to an internal mechanism, a wait cycle is always inserted between consecutive read and
write SMC accesses.
This wait cycle is referred to as a read to write wait state in this document.
This wait cycle is applied in addition to chip select and reload user configuration wait states
when they are to be inserted. See
Figure 21-16 on page
173.
AT91SAM9G20 Preliminary
176
6384B–ATARM–15-Dec-08

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