at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 212

• Manufacturer Part Number: at91sam9g20-cu
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

22.6.1
Register Name:SDRAMC_MR
Access Type:Read-write
Reset Value: 0x00000000
• MODE: SDRAMC Command Mode
This field defines the command issued by the SDRAM Controller when the SDRAM device is accessed.
212
0
0
0
0
1
1
1
31
23
15
MODE
–
–
–
7
–
0
0
1
1
0
0
1
AT91SAM9G20 Preliminary
SDRAMC Mode Register
0
1
0
1
0
1
0
Description
Normal mode. Any access to the SDRAM is decoded normally. To activate this mode, command must be
followed by a write to the SDRAM.
The SDRAM Controller issues a NOP command when the SDRAM device is accessed regardless of the cycle.
To activate this mode, command must be followed by a write to the SDRAM.
The SDRAM Controller issues an “All Banks Precharge” command when the SDRAM device is accessed
regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM.
The SDRAM Controller issues a “Load Mode Register” command when the SDRAM device is accessed
regardless of the cycle. To activate this mode, command must be followed by a write to the SDRAM.
The SDRAM Controller issues an “Auto-Refresh” Command when the SDRAM device is accessed regardless of
the cycle. Previously, an “All Banks Precharge” command must be issued. To activate this mode, command must
be followed by a write to the SDRAM.
The SDRAM Controller issues an “Extended Load Mode Register” command when the SDRAM device is
accessed regardless of the cycle. To activate this mode, the “Extended Load Mode Register” command must be
followed by a write to the SDRAM. The write in the SDRAM must be done in the appropriate bank; most low-
power SDRAM devices use the bank 1.
Deep power-down mode. Enters deep power-down mode.
30
22
14
–
–
–
6
–
29
21
13
–
–
–
5
–
28
20
12
–
–
–
4
–
27
19
11
–
–
–
3
–
26
18
10
–
–
–
2
MODE
25
17
–
–
9
–
1
6384B–ATARM–15-Dec-08
24
16
–
–
8
–
0