at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 23

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at91sam9g20-cu

Manufacturer Part Number
at91sam9g20-cu
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet

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9.2
9.3
9.4
6384B–ATARM–15-Dec-08
Reset Controller
Shutdown Controller
Clock Generator
• Based on two Power-on-Reset cell
• Status of the last reset
• Controls the internal resets and the NRST pin output
• Shutdown and Wake-Up logic
• Embeds a Low Power 32768 Hz Slow Clock Oscillator and a Low power RC oscillator
• Embeds the Main Oscillator
• Embeds 2 PLLs
selectable with OSCSEL signal
– one on VDDBU and one on VDDCORE
– Either general reset (VDDBU rising), wake-up reset (VDDCORE rising), software
– Allows shaping a reset signal for the external devices
– Software programmable assertion of the SHDWN pin
– Deassertion Programmable on a WKUP pin level change or on alarm
– Provides the permanent Slow Clock SLCK to the system
– Oscillator bypass feature
– Supports 3 to 20 MHz crystals
– The PLL A outputs 400-800 MHz clock
– The PLL B outputs 100 MHz clock
– Both integrate an input divider to increase output accuracy
– PLL A and PLL B embed their own filters
reset, user reset or watchdog reset
AT91SAM9G20 Preliminary
23

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