at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 203

• Manufacturer Part Number: at91sam9g20-cu
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

Figure 22-1. SDRAM Device Initialization Sequence
22.4.2
22.4.3
6384B–ATARM–15-Dec-08
SDRAMC_A[12:11]
SDRAMC_A[9:0]
SDCKE
SDWE
SDCK
SDCS
RAS
CAS
NBS
A10
I/O Lines
Interrupt
Inputs Stable for
200 μsec
The pins used for interfacing the SDRAM Controller may be multiplexed with the PIO lines. The
programmer must first program the PIO controller to assign the SDRAM Controller pins to their
peripheral function. If I/O lines of the SDRAM Controller are not used by the application, they
can be used for other purposes by the PIO Controller.
The SDRAM Controller interrupt (Refresh Error notification) is connected to the Memory Control-
ler. This interrupt may be ORed with other System Peripheral interrupt lines and is finally
provided as the System Interrupt Source (Source 1) to the AIC (Advanced Interrupt Controller).
Using the SDRAM Controller interrupt requires the AIC to be programmed first.
Precharge All Banks
t
RP
1st Auto-refresh
8th Auto-refresh
AT91SAM9G20 Preliminary
t
RC
MRS Command
t
MRD
Valid Command
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