at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 195
at91sam9g20-cu
Manufacturer Part Number
at91sam9g20-cu
Description
At91 Arm Thumb Microcontrollers
Manufacturer
ATMEL Corporation
Datasheet
1.AT91SAM9G20-CU.pdf
(814 pages)
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21.14.2
Register Name:SMC_PULSE[0..7]
Access Type:Read-write
• NWE_PULSE: NWE Pulse Length
The NWE signal pulse length is defined as:
NWE pulse length = (256* NWE_PULSE[6] + NWE_PULSE[5:0]) clock cycles
The NWE pulse length must be at least 1 clock cycle.
• NCS_WR_PULSE: NCS Pulse Length in WRITE Access
In write access, the NCS signal pulse length is defined as:
NCS pulse length = (256* NCS_WR_PULSE[6] + NCS_WR_PULSE[5:0]) clock cycles
The NCS pulse length must be at least 1 clock cycle.
• NRD_PULSE: NRD Pulse Length
In standard read access, the NRD signal pulse length is defined in clock cycles as:
NRD pulse length = (256* NRD_PULSE[6] + NRD_PULSE[5:0]) clock cycles
The NRD pulse length must be at least 1 clock cycle.
In page mode read access, the NRD_PULSE parameter defines the duration of the subsequent accesses in the page.
• NCS_RD_PULSE: NCS Pulse Length in READ Access
In standard read access, the NCS signal pulse length is defined as:
NCS pulse length = (256* NCS_RD_PULSE[6] + NCS_RD_PULSE[5:0]) clock cycles
The NCS pulse length must be at least 1 clock cycle.
In page mode read access, the NCS_RD_PULSE parameter defines the duration of the first access to one page.
6384B–ATARM–15-Dec-08
31
23
15
–
–
–
7
–
SMC Pulse Register
30
22
14
6
29
21
13
5
28
20
12
4
NCS_WR_PULSE
NCS_RD_PULSE
NWE_PULSE
NRD_PULSE
27
19
11
3
AT91SAM9G20 Preliminary
26
18
10
2
25
17
9
1
24
16
8
0
195
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