at91sam9g20-cu ATMEL Corporation, at91sam9g20-cu Datasheet - Page 20

• Manufacturer Part Number: at91sam9g20-cu
• Description: At91 Arm Thumb Microcontrollers
• Manufacturer: ATMEL Corporation

8.2.1
8.2.2
8.2.3
20
AT91SAM9G20 Preliminary
External Bus Interface
Static Memory Controller
SDRAM Controller
Refer to the memory map in
• Integrates three External Memory Controllers
• Additional logic for NAND Flash
• Full 32-bit External Data Bus
• Up to 26-bit Address Bus (up to 64MBytes linear)
• Up to 8 chip selects, Configurable Assignment:
• 8-, 16- or 32-bit Data Bus
• Multiple Access Modes supported
• Multiple device adaptability
• Multiple Wait State Management
• Slow Clock mode supported
• Supported devices
• Numerous configurations supported
• Programming facilities
– Static Memory Controller
– SDRAM Controller
– ECC Controller
– Static Memory Controller on NCS0
– SDRAM Controller or Static Memory Controller on NCS1
– Static Memory Controller on NCS2
– Static Memory Controller on NCS3, Optional NAND Flash support
– Static Memory Controller on NCS4 - NCS5, Optional CompactFlash support
– Static Memory Controller on NCS6-NCS7
– Byte Write or Byte Select Lines
– Asynchronous read in Page Mode supported (4- up to 32-byte page size)
– Compliant with LCD Module
– Control signals programmable setup, pulse and hold time for each Memory Bank
– Programmable Wait State Generation
– External Wait Request
– Programmable Data Float Time
– Standard and Low-power SDRAM (Mobile SDRAM)
– 2K, 4K, 8K Row Address Memory Parts
– SDRAM with two or four Internal Banks
– SDRAM with 16- or 32-bit Datapath
– Word, half-word, byte access
– Automatic page break when Memory Boundary has been reached
Figure 8-1 on page
17.
6384B–ATARM–15-Dec-08