afs600 Actel Corporation, afs600 Datasheet - Page 103
afs600
Manufacturer Part Number
afs600
Description
Actel Fusion Programmable System Chips Mixed-signal Family With Optional Arm Support
Manufacturer
Actel Corporation
Datasheet
1.AFS600.pdf
(296 pages)
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Analog-to-Digital Converter Block
At the heart of the Fusion analog system is a programmable Successive Approximation Register (SAR) ADC. The ADC
can support 8-, 10-, or 12-bit modes of operation. In 12-bit mode, the ADC can resolve 500 ksps. All results are MSB-
justified in the ADC. The input to the ADC is a large 32:1 analog input multiplexer. A simplified block diagram of the
Analog Quads, analog input multiplexer, and ADC is shown in
modes to ensure consistent high performance both at power-up and during runtime.
Figure 2-79 • ADC Block Diagram
ATRETURN01
ATRETURN23
ATRETURN45
ATRETURN67
ATRETURN89
AG7
AG8
AG9
AV7
AC7
AV8
AC8
AV9
AC9
AV4
AG4
AV5
AG5
AV6
AG6
AT7
AT8
AT9
AG3
AC4
AT4
AC5
AT5
AC6
AT6
AV3
AG1
AG2
AC3
AT3
AV1
AC1
AV2
AC2
AV0
AG0
AT1
AT2
AC0
AT0
Pads
Analog
Quad 0
Analog
Quad 1
Analog
Quad 3
Analog
Quad 7
Analog
Quad 8
Analog
Quad 9
Analog
Quad 2
Analog
Quad 4
Analog
Quad 5
Analog
Quad 6
Internal Diode
Temperature
Monitor
V
CC
(1.5 V)
A d v an c ed v1 . 4
0
1
31
CHNUMBER[4:0]
Figure
Analog MUX
(32 to 1)
2-79. The ADC offers multiple self-calibrating
Actel Fusion Programmable System Chips
Digital Output to FPGA
ADC
These are hardwired
connections within
Analog Quad.
12
2-89
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